From patchwork Fri Feb 24 20:01:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 9591125 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A15026042B for ; Fri, 24 Feb 2017 20:01:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 955F2287F7 for ; Fri, 24 Feb 2017 20:01:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A77B2894A; Fri, 24 Feb 2017 20:01:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D32EB287F7 for ; Fri, 24 Feb 2017 20:01:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F0E5F6ED10; Fri, 24 Feb 2017 20:01:24 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7BDFC6ED0A for ; Fri, 24 Feb 2017 20:01:23 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Feb 2017 12:01:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.35,201,1484035200"; d="scan'208"; a="1134547393" Received: from relo-linux-11.sc.intel.com ([10.3.160.214]) by fmsmga002.fm.intel.com with ESMTP; 24 Feb 2017 12:01:22 -0800 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Fri, 24 Feb 2017 12:01:20 -0800 Message-Id: <20170224200122.2571-1-michel.thierry@intel.com> X-Mailer: git-send-email 2.11.0 Subject: [Intel-gfx] [PATCH v2 1/3] drm/i915: Capture dmc firmware information before reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The firmware may change between the hang and cat /sys/class/drm/card0/error v2: if version is 0, the fw was not loaded. Cc: Chris Wilson Reviewed-by: Michal Wajdeczko Reviewed-by: Chris Wilson Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ drivers/gpu/drm/i915/i915_gpu_error.c | 21 +++++++++++++++------ 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a74b87b1b5a9..47f8d5e47c8f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -953,6 +953,9 @@ struct i915_gpu_state { u32 gab_ctl; u32 gfx_mode; + /* Firmware load state */ + u32 dmc_version; + u32 nfence; u64 fence[I915_MAX_NUM_FENCES]; struct intel_overlay_error_state *overlay; diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 2b1d15668192..4e6cf705c779 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -623,13 +623,10 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m, err_printf(m, "IOMMU enabled?: %d\n", error->iommu); if (HAS_CSR(dev_priv)) { - struct intel_csr *csr = &dev_priv->csr; - - err_printf(m, "DMC loaded: %s\n", - yesno(csr->dmc_payload != NULL)); + err_printf(m, "DMC loaded: %s\n", yesno(error->dmc_version)); err_printf(m, "DMC fw version: %d.%d\n", - CSR_VERSION_MAJOR(csr->version), - CSR_VERSION_MINOR(csr->version)); + CSR_VERSION_MAJOR(error->dmc_version), + CSR_VERSION_MINOR(error->dmc_version)); } err_printf(m, "EIR: 0x%08x\n", error->eir); @@ -1585,6 +1582,17 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, error->pgtbl_er = I915_READ(PGTBL_ER); } +/* Capture all firmware related information. */ +static void i915_capture_fw_state(struct drm_i915_private *dev_priv, + struct i915_gpu_state *error) +{ + if (HAS_CSR(dev_priv)) { + struct intel_csr *csr = &dev_priv->csr; + + error->dmc_version = csr->version; + } +} + static void i915_error_capture_msg(struct drm_i915_private *dev_priv, struct i915_gpu_state *error, u32 engine_mask, @@ -1650,6 +1658,7 @@ static int capture(void *data) i915_capture_gen_state(error->i915, error); i915_capture_reg_state(error->i915, error); + i915_capture_fw_state(error->i915, error); i915_gem_record_fences(error->i915, error); i915_gem_record_rings(error->i915, error); i915_capture_active_buffers(error->i915, error);