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[v2,2/3] drm/i915: Include GuC fw version in error state

Message ID 20170224200122.2571-2-michel.thierry@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michel Thierry Feb. 24, 2017, 8:01 p.m. UTC
There was no way to check if the platform is running the latest
firmware.

v2: use HAS_GUC and intel_guc* (Michal)
    capture before reset (Chris)
v3: if version is 0, the fw was not loaded.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  1 +
 drivers/gpu/drm/i915/i915_gpu_error.c | 15 +++++++++++++++
 2 files changed, 16 insertions(+)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 47f8d5e47c8f..37cda64f07ad 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -955,6 +955,7 @@  struct i915_gpu_state {
 
 	/* Firmware load state */
 	u32 dmc_version;
+	u32 guc_version;
 
 	u32 nfence;
 	u64 fence[I915_MAX_NUM_FENCES];
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 4e6cf705c779..bb1b9e916638 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -629,6 +629,13 @@  int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 			   CSR_VERSION_MINOR(error->dmc_version));
 	}
 
+	if (HAS_GUC(dev_priv)) {
+		err_printf(m, "GuC loaded: %s\n", yesno(error->guc_version));
+		err_printf(m, "GuC fw version: %d.%d\n",
+			   error->guc_version >> 16,
+			   error->guc_version & 0xffff);
+	}
+
 	err_printf(m, "EIR: 0x%08x\n", error->eir);
 	err_printf(m, "IER: 0x%08x\n", error->ier);
 	for (i = 0; i < error->ngtier; i++)
@@ -1591,6 +1598,14 @@  static void i915_capture_fw_state(struct drm_i915_private *dev_priv,
 
 		error->dmc_version = csr->version;
 	}
+
+	if (HAS_GUC(dev_priv)) {
+		struct intel_guc *guc = &dev_priv->guc;
+
+		error->guc_version =
+			(guc->fw.major_ver_found << 16 |
+			 guc->fw.minor_ver_found);
+	}
 }
 
 static void i915_error_capture_msg(struct drm_i915_private *dev_priv,