From patchwork Mon Mar 6 23:54:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Auld X-Patchwork-Id: 9607855 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3879E601D2 for ; Mon, 6 Mar 2017 23:54:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2078428470 for ; Mon, 6 Mar 2017 23:54:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1576728497; Mon, 6 Mar 2017 23:54:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AF62428470 for ; Mon, 6 Mar 2017 23:54:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 121236E583; Mon, 6 Mar 2017 23:54:26 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7CFAE6E578 for ; Mon, 6 Mar 2017 23:54:23 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP; 06 Mar 2017 15:54:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,256,1484035200"; d="scan'208";a="233013090" Received: from abahri-mobl.ger.corp.intel.com (HELO mwahaha.ger.corp.intel.com) ([10.252.2.118]) by fmsmga004.fm.intel.com with ESMTP; 06 Mar 2017 15:54:22 -0800 From: Matthew Auld To: intel-gfx@lists.freedesktop.org Date: Mon, 6 Mar 2017 23:54:05 +0000 Message-Id: <20170306235414.23407-7-matthew.auld@intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170306235414.23407-1-matthew.auld@intel.com> References: <20170306235414.23407-1-matthew.auld@intel.com> Subject: [Intel-gfx] [PATCH 06/15] drm/i915: pass page_size to insert_entries X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/i915_gem_gtt.c | 32 ++++++++++++++++++++++----- drivers/gpu/drm/i915/i915_gem_gtt.h | 1 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 3 ++- drivers/gpu/drm/i915/selftests/mock_gtt.c | 1 + 4 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index cee9c4fec52a..9274974956b3 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -205,7 +205,7 @@ static int ppgtt_bind_vma(struct i915_vma *vma, pte_flags |= PTE_READ_ONLY; vma->vm->insert_entries(vma->vm, vma->pages, vma->node.start, - cache_level, pte_flags); + vma->obj->page_size, cache_level, pte_flags); return 0; } @@ -906,6 +906,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt, static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm, struct sg_table *pages, u64 start, + unsigned long page_size, enum i915_cache_level cache_level, u32 unused) { @@ -924,6 +925,7 @@ static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm, static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm, struct sg_table *pages, u64 start, + unsigned long page_size, enum i915_cache_level cache_level, u32 unused) { @@ -935,9 +937,23 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm, }; struct i915_page_directory_pointer **pdps = ppgtt->pml4.pdps; struct gen8_insert_pte idx = gen8_insert_pte(start); + bool (*insert_entries)(struct i915_hw_ppgtt *ppgtt, + struct i915_page_directory_pointer *pdp, + struct sgt_dma *iter, + struct gen8_insert_pte *idx, + enum i915_cache_level cache_level); + + switch (page_size) { + case I915_GTT_PAGE_SIZE: + insert_entries = gen8_ppgtt_insert_pte_entries; + break; + default: + MISSING_CASE(page_size); + return; + } - while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[idx.pml4e++], &iter, - &idx, cache_level)) + while (insert_entries(ppgtt, pdps[idx.pml4e++], &iter, &idx, + cache_level)) GEM_BUG_ON(idx.pml4e >= GEN8_PML4ES_PER_PML4); } @@ -1620,6 +1636,7 @@ static void gen6_ppgtt_clear_range(struct i915_address_space *vm, static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, struct sg_table *pages, u64 start, + unsigned long page_size, enum i915_cache_level cache_level, u32 flags) { @@ -2093,6 +2110,7 @@ static void gen8_ggtt_insert_page(struct i915_address_space *vm, static void gen8_ggtt_insert_entries(struct i915_address_space *vm, struct sg_table *st, u64 start, + unsigned long page_size, enum i915_cache_level level, u32 unused) { @@ -2140,6 +2158,7 @@ static void gen6_ggtt_insert_page(struct i915_address_space *vm, static void gen6_ggtt_insert_entries(struct i915_address_space *vm, struct sg_table *st, u64 start, + unsigned long page_size, enum i915_cache_level level, u32 flags) { @@ -2224,6 +2243,7 @@ static void i915_ggtt_insert_page(struct i915_address_space *vm, static void i915_ggtt_insert_entries(struct i915_address_space *vm, struct sg_table *pages, u64 start, + unsigned long page_size, enum i915_cache_level cache_level, u32 unused) { @@ -2260,7 +2280,7 @@ static int ggtt_bind_vma(struct i915_vma *vma, intel_runtime_pm_get(i915); vma->vm->insert_entries(vma->vm, vma->pages, vma->node.start, - cache_level, pte_flags); + I915_GTT_PAGE_SIZE, cache_level, pte_flags); intel_runtime_pm_put(i915); /* @@ -2314,14 +2334,14 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma, appgtt->base.insert_entries(&appgtt->base, vma->pages, vma->node.start, - cache_level, pte_flags); + I915_GTT_PAGE_SIZE, cache_level, pte_flags); } if (flags & I915_VMA_GLOBAL_BIND) { intel_runtime_pm_get(i915); vma->vm->insert_entries(vma->vm, vma->pages, vma->node.start, - cache_level, pte_flags); + I915_GTT_PAGE_SIZE, cache_level, pte_flags); intel_runtime_pm_put(i915); } diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 6c90a2ffd0e1..1f51402cf816 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -328,6 +328,7 @@ struct i915_address_space { void (*insert_entries)(struct i915_address_space *vm, struct sg_table *st, u64 start, + unsigned long page_size, enum i915_cache_level cache_level, u32 flags); void (*cleanup)(struct i915_address_space *vm); diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index c4a39b7d7dd0..c7963efe46ba 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -256,7 +256,8 @@ static int lowlevel_hole(struct drm_i915_private *i915, break; vm->insert_entries(vm, obj->mm.pages, addr, - I915_CACHE_NONE, 0); + I915_GTT_PAGE_SIZE, I915_CACHE_NONE, + 0); } count = n; diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c index a61309c7cb3e..a2137100d2f5 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gtt.c +++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c @@ -35,6 +35,7 @@ static void mock_insert_page(struct i915_address_space *vm, static void mock_insert_entries(struct i915_address_space *vm, struct sg_table *st, u64 start, + unsigned long page_size, enum i915_cache_level level, u32 flags) { }