From patchwork Wed Mar 15 23:41:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9626857 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2B6F3604A9 for ; Wed, 15 Mar 2017 23:41:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1BC55285ED for ; Wed, 15 Mar 2017 23:41:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0F6F1285FC; Wed, 15 Mar 2017 23:41:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B8425285ED for ; Wed, 15 Mar 2017 23:41:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 598506E2FA; Wed, 15 Mar 2017 23:41:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pg0-x230.google.com (mail-pg0-x230.google.com [IPv6:2607:f8b0:400e:c05::230]) by gabe.freedesktop.org (Postfix) with ESMTPS id 116FA6E2F8 for ; Wed, 15 Mar 2017 23:41:20 +0000 (UTC) Received: by mail-pg0-x230.google.com with SMTP id n190so16034960pga.0 for ; Wed, 15 Mar 2017 16:41:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=hlxlRRuDqYnKjo8o7aUxiLWwp2GAyJaHXVH+1Co166Y=; b=FUxVMZD5BLEv2eNI4msibevPCkpfloo6jH7ZaeCG/8bfpVD/gRrCySlOYtb6gwoHt2 lOXA8OARqmNj3ClV0r8WQ6P+mLGwAydsTxGPhOfbDlgorhywz9/7B+jLrZyYulsu2Ydn 4wiRSfLCxjYBFjKeyfsZn1dBoLN9Sbb44e4Xwiy+fsoM7BijStYTivNlLLBUxlLl/c8I 5YQnKHThO/WZeVQYHr1zzIhUgmUbEQHHX6fqJI1u6qAbZc83LzXVOH5GHaRf7ri4gS8/ 44v/pXC940NWxZsCEXlIlaES5wvQ2H5FXuH6BWp6bbj0oEWgLtkxyEx75/Zl8jZnJmPd 76Pg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=hlxlRRuDqYnKjo8o7aUxiLWwp2GAyJaHXVH+1Co166Y=; b=QaP4KFuWYqwtUp04sHXtgQJyedptNC6ko8TSI2iAdzr9L683JP1oCJrHvcxqz6KDe9 gCUGtni3j9UJ0u6CdZlkkNpah31x+SrA7r+P4E5QqRYVVrI6PcIcWW9RbC2r198sq6SO 6V1pusKeUN7dZM55yn1RgOQbv7JCEWXfIEUkTEFIr+7JFwlBqX923UdR2S8SrQsN0l7l valrpTCE8q3+oCt0M9iq9nH33WcMi30Hmbwz40/tMMNo8tiX8gI5DeW0mzi/9msb06bk vvvQcjBkk3kPD3QR8dGXkDwGfP97OpzJ2l6ew2NqBwpYdz/sbqFsgp9gdGdDpdQJ+/zR wqmA== X-Gm-Message-State: AFeK/H2GWdKb7gK3zb9rHnOFUJ+iE3W8I1J8Zrrca3cP9lfbw0DCEWj4do5RjEZ2RZWvdrlF X-Received: by 10.99.96.130 with SMTP id u124mr6517816pgb.216.1489621279550; Wed, 15 Mar 2017 16:41:19 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([172.22.64.53]) by smtp.gmail.com with ESMTPSA id n15sm6290965pfj.18.2017.03.15.16.41.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Mar 2017 16:41:18 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id 0588D11F8DD; Wed, 15 Mar 2017 16:41:15 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org, Jani Nikula Date: Wed, 15 Mar 2017 16:41:11 -0700 Message-Id: <20170315234111.57204-7-puthik@chromium.org> X-Mailer: git-send-email 2.12.0.367.g23dc2f6d3c-goog In-Reply-To: <20170315234111.57204-1-puthik@chromium.org> References: <20170315234111.57204-1-puthik@chromium.org> Cc: Puthikorn Voravootivat Subject: [Intel-gfx] [PATCH v3 6/6] drm/i915: Set PWM divider to match desired frequency in vbt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Read desired PWM frequency from panel vbt and calculate the value for divider in DPCD address 0x724 and 0x728 to match that frequency as close as possible. Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 54 +++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index 755ff47ab1ea..34e1e24ec60a 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -111,12 +111,58 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, dbc, sizeof(dbc)); } +/* + * Set PWM Frequency divider to match desired frequency in vbt. + * The PWM Frequency is calculated as 27Mhz / (F x P). + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) + */ +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) { + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + int freq, fxp, f; + u8 pn, pn_min, pn_max; + + /* Find desired value of (F x P) + * Note that, if F x P is out of supported range, the maximum value or + * minimum value will applied automatically. So no need to check that. + */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; + fxp = DP_EDP_BACKLIGHT_FREQ_BASE / freq; + + /* Use lowest possible value of Pn to try to make F to be between 1 and + * 255 while still in the range Pn_min and Pn_max + */ + if (!drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min)) { + return; + } + if (!drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max)) { + return; + } + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + f = fxp / (1 << pn_min); + for (pn = pn_min; pn < pn_max && f > 255; pn++, f /= 2); + + /* Cap F to be in the range between 1 and 255. */ + f = min(f, 255); + f = max(f, 1); + + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, pn); + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_FREQ_SET, (u8) f); +} + static void intel_dp_aux_enable_backlight(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); uint8_t dpcd_buf = 0; uint8_t new_dpcd_buf = 0; uint8_t edp_backlight_mode = 0; + bool freq_cap; set_aux_backlight_enable(intel_dp, true); @@ -147,10 +193,18 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) intel_dp_aux_set_dynamic_backlight_percent(intel_dp, 0, 100); } + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; + if (freq_cap) + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; + if (new_dpcd_buf != dpcd_buf) { drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf); } + + if (freq_cap) + intel_dp_aux_set_pwm_freq(connector); + intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); }