From patchwork Wed Mar 22 22:54:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9640227 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 025B260328 for ; Wed, 22 Mar 2017 22:54:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E921C284DC for ; Wed, 22 Mar 2017 22:54:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DDD4F284F2; Wed, 22 Mar 2017 22:54:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 725B7284F0 for ; Wed, 22 Mar 2017 22:54:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CFCD26E9D3; Wed, 22 Mar 2017 22:54:50 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pg0-x229.google.com (mail-pg0-x229.google.com [IPv6:2607:f8b0:400e:c05::229]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0E7DD6E990 for ; Wed, 22 Mar 2017 22:54:49 +0000 (UTC) Received: by mail-pg0-x229.google.com with SMTP id w20so11176808pgc.0 for ; Wed, 22 Mar 2017 15:54:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=VrVb/IxF0h36nkuSa1Z4WNd+fcqk2Dc+nz1TK6EwS+k=; b=scRI77VkLrDzKaXlnxOxWsAe+GEAgIbPNcwMjfH0NhbmgmNEou3lTWwNEraZ3dBTrp ykvcx/sGP30ZW7bcTLT+JKwMQt90KcRXkHbet4H0QalG0cL2f8XCkUe+zQtmp+zcExm6 XML+lvDaBK2uTOcsa+ekEYTZIprpL5o9Bvj7iwFxteBSKACWgeQqIlZaLtAcwZG5HFph vcelhcfzTscORkxT5HxVefkJvm/sRbkh+h7VBtMPmbO0GAfyzN4y1zZdDk++KONpqFaC 1weWjoYaZOrV2L4vhwXQtocU2GUIQdgDEoAUBiuzRrJ3XrH4ZkRNgmsLNJFfXT/lZNcw U82A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=VrVb/IxF0h36nkuSa1Z4WNd+fcqk2Dc+nz1TK6EwS+k=; b=tbrTLQP6Y4bzNBXCXlotBcl1wnnNpaogLizUjvW0bNOYmMMC8PaldMAUpIM7tZtRhe IMOuf/fGfNOxbjnnaxGpScTH9OmNDuRzBQZtU02/xUoyuYrwyslkU5CP0ftMdFaAm8tO bo5I1LxJNbme58bQfxiL0rr3WAr5S+jS5xzj7M7DI0VYOL1Z9L56R4jmHKYvQ0UoRtuf GyM+0VjwTpridZoDbKs42iVEX2J/HFb4ynB03xaB0HdH8eL/Do1dusVuL6TcdjNFYFpI 1eieWr8GjRPOQwvzVRy10N4oPAeYF3Qz7w5FbUjaAlSrNDQ5hTiCPgt8U+7BP73ddT6U UkGQ== X-Gm-Message-State: AFeK/H2rMtCn87jCQQwFsW2buuIdwazSltTgqa0jrSJSXisVVTJAWVuGz7TZk69dT+q8oi+Z X-Received: by 10.98.144.16 with SMTP id a16mr48880442pfe.247.1490223288519; Wed, 22 Mar 2017 15:54:48 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([2620:0:1000:1301:49a8:6d81:3bed:a479]) by smtp.gmail.com with ESMTPSA id t6sm5913634pgo.42.2017.03.22.15.54.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Mar 2017 15:54:47 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id B6FA911F888; Wed, 22 Mar 2017 15:54:46 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org, Jani Nikula Date: Wed, 22 Mar 2017 15:54:43 -0700 Message-Id: <20170322225443.79343-7-puthik@chromium.org> X-Mailer: git-send-email 2.12.1.500.gab5fba24ee-goog In-Reply-To: <20170322225443.79343-1-puthik@chromium.org> References: <20170322225443.79343-1-puthik@chromium.org> Cc: Puthikorn Voravootivat Subject: [Intel-gfx] [PATCH v4 6/6] drm/i915: Set PWM divider to match desired frequency in vbt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Read desired PWM frequency from panel vbt and calculate the value for divider in DPCD address 0x724 and 0x728 to match that frequency as close as possible. Cc: Jani Nikula Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index f99cf0a6ae44..9adc77bfb515 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -111,12 +111,60 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, dbc, sizeof(dbc)); } +/* + * Set PWM Frequency divider to match desired frequency in vbt. + * The PWM Frequency is calculated as 27Mhz / (F x P). + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) + */ +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + int freq, fxp, f; + u8 pn, pn_min, pn_max; + + /* Find desired value of (F x P) + * Note that, if F x P is out of supported range, the maximum value or + * minimum value will applied automatically. So no need to check that. + */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; + fxp = DP_EDP_BACKLIGHT_FREQ_BASE / freq; + + /* Use lowest possible value of Pn to try to make F to be between 1 and + * 255 while still in the range Pn_min and Pn_max + */ + if (!drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min)) { + return; + } + if (!drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max)) { + return; + } + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + f = fxp / (1 << pn_min); + for (pn = pn_min; pn < pn_max && f > 255; pn++) + f /= 2; + + /* Cap F to be in the range between 1 and 255. */ + f = min(f, 255); + f = max(f, 1); + + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, pn); + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_FREQ_SET, (u8) f); +} + static void intel_dp_aux_enable_backlight(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); uint8_t dpcd_buf = 0; uint8_t new_dpcd_buf = 0; uint8_t edp_backlight_mode = 0; + bool freq_cap; set_aux_backlight_enable(intel_dp, true); @@ -147,10 +195,18 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) intel_dp_aux_set_dynamic_backlight_percent(intel_dp, 0, 100); } + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; + if (freq_cap) + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; + if (new_dpcd_buf != dpcd_buf) { drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf); } + + if (freq_cap) + intel_dp_aux_set_pwm_freq(connector); + intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); }