From patchwork Tue Apr 18 23:48:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9686705 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7F1BD602C2 for ; Tue, 18 Apr 2017 23:48:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7131428354 for ; Tue, 18 Apr 2017 23:48:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 662AC2838E; Tue, 18 Apr 2017 23:48:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E73852837F for ; Tue, 18 Apr 2017 23:48:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 68CE66E22B; Tue, 18 Apr 2017 23:48:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pg0-x236.google.com (mail-pg0-x236.google.com [IPv6:2607:f8b0:400e:c05::236]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4A5166E22B for ; Tue, 18 Apr 2017 23:48:39 +0000 (UTC) Received: by mail-pg0-x236.google.com with SMTP id g2so3860638pge.3 for ; Tue, 18 Apr 2017 16:48:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=RCD726CbBFZdqzSLOJh8GxIPkO1xZ6XITxB2ufmVrqI=; b=E7iV+A98tDwB1kvVVSc0nRb7RIQ6R6qOerEq1cm0UybBE2tYQZCaOUa6ebe1wVGY3b sNPsLpPHGQgGUL4VxaqrgXxn6LvFEdRmKYTsNizJeW1j9V29hRO7omxlnyDW6+x4Gucb S9iqhZPQr6eV22ma+QkmqVWu1PECQ20aKvxEddwTQ6xQGJP4ydTqrit+wpwKF//efMcs 1guUeLQ54KCoQTJOgJbaEH6kx1krWmL/O6qW90eEeNpf8PxYRDjU5wfQQ/N1RlEf8Bni ZGwpZVEtlWb6UVjvpG0cEkF/W5liuw52o6uqpdHSiQzLLoUwup/tMC0IwWS5SoTxeTCv mLDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=RCD726CbBFZdqzSLOJh8GxIPkO1xZ6XITxB2ufmVrqI=; b=Ptb5BnooBzIX4isiNam/HmPqzNe0Ym91xJ8EdgvcJ/lSyGowFF1B4OZtoLBe3U6boE LFKwCJsteUYngu5ukHs9dix3JVky/VCcNkc/s83MeG05WWDzVVC00xPRBbjSk8adZQ3e ayRT6FaxGZ0nGYwRRVskmJm79OTC6OBFxAKdknXgaZwH+WbmieH2fMGBKqHABkq/FjaA Gf9ebMPlUZj+nKu6dxQiuTtYaqhF9NT1UpDdP6juQ03Yj4NbZ6AfDOHpJrk45mgvg5Ev tW16TUZaG2Rt2rlCaySu+QApGeZU2uXib8tSLbSnPkK53F4OgueS3eOZFUCSx+gNgoEe P6Kw== X-Gm-Message-State: AN3rC/4DzwVNtvvdqT21432HyN6fRBdAZ3MmwnToqfggm/wfdzUaA2OR sbLrVhBYx0IcuGrB X-Received: by 10.99.2.88 with SMTP id 85mr23422pgc.23.1492559318715; Tue, 18 Apr 2017 16:48:38 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([172.22.64.53]) by smtp.gmail.com with ESMTPSA id y123sm555652pfg.52.2017.04.18.16.48.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Apr 2017 16:48:38 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id 8357911F895; Tue, 18 Apr 2017 16:48:37 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org, Jani Nikula Date: Tue, 18 Apr 2017 16:48:19 -0700 Message-Id: <20170418234824.157355-2-puthik@chromium.org> X-Mailer: git-send-email 2.12.2.816.g2cccc81164-goog In-Reply-To: <20170418234824.157355-1-puthik@chromium.org> References: <20170418234824.157355-1-puthik@chromium.org> Cc: Puthikorn Voravootivat Subject: [Intel-gfx] [PATCH RESEND v4 1/6] drm/i915: Add DPCD preferred mode for backlight control X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Currently the intel_dp_aux_backlight driver requires eDP panel to not also support backlight adjustment via PWM pin to use this driver. This force the eDP panel that support both ways of backlight adjustment to do it via PWM pin. This patch adds the new prefer DPCD mode in the i915_param to make it enable to prefer DPCD over the PWM via kernel param. This patch also add a check to DP_EDP_BACKLIGHT_AUX_ENABLE_CAP in set_aux_backlight_enable() since the backlight enablement can be done via BL_ENABLE eDP connector pin in the case that it does not support doing that via AUX. Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/i915_params.c | 6 ++--- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 33 +++++++++++++++++++-------- 3 files changed, 27 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index b6a7e363d076..960393dd5edf 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -63,7 +63,7 @@ struct i915_params i915 __read_mostly = { .huc_firmware_path = NULL, .enable_dp_mst = true, .inject_load_failure = 0, - .enable_dpcd_backlight = false, + .enable_dpcd_backlight = 0, .enable_gvt = false, }; @@ -246,9 +246,9 @@ MODULE_PARM_DESC(enable_dp_mst, module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); MODULE_PARM_DESC(inject_load_failure, "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); -module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); +module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, int, 0600); MODULE_PARM_DESC(enable_dpcd_backlight, - "Enable support for DPCD backlight control (default:false)"); + "Enable support for DPCD backlight control (0:disable (default), 1:prefer PWM pin, 2: prefer DPCD)"); module_param_named(enable_gvt, i915.enable_gvt, bool, 0400); MODULE_PARM_DESC(enable_gvt, diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 34148cc8637c..bf6e2c60f697 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -51,6 +51,7 @@ func(int, use_mmio_flip); \ func(int, mmio_debug); \ func(int, edp_vswing); \ + func(int, enable_dpcd_backlight); \ func(unsigned int, inject_load_failure); \ /* leave bools at the end to not create holes */ \ func(bool, alpha_support); \ @@ -66,7 +67,6 @@ func(bool, verbose_state_checks); \ func(bool, nuclear_pageflip); \ func(bool, enable_dp_mst); \ - func(bool, enable_dpcd_backlight); \ func(bool, enable_gvt) #define MEMBER(T, member) T member diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index 6532e226db29..42f73d9a3ccf 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -28,6 +28,10 @@ static void set_aux_backlight_enable(struct intel_dp *intel_dp, bool enable) { uint8_t reg_val = 0; + /* Early return when display use other mechanism to enable backlight. */ + if (!(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP)) + return; + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_DISPLAY_CONTROL_REGISTER, ®_val) < 0) { DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", @@ -138,27 +142,36 @@ static bool intel_dp_aux_display_control_capable(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + bool supported; /* Check the eDP Display control capabilities registers to determine if * the panel can support backlight control over the aux channel */ - if (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP && - (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && - !((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) || - (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP))) { - DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); - return true; + switch (i915.enable_dpcd_backlight) { + case 1: /* prefer PWM pin */ + supported = (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP) && + (intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) && + !(intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_PIN_ENABLE_CAP) && + !(intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP); + break; + case 2: /* prefer DPCD */ + supported = (intel_dp->edp_dpcd[1] & DP_EDP_TCON_BACKLIGHT_ADJUSTMENT_CAP) && + (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP); + break; + default: + supported = false; } - return false; + + if (supported) + DRM_DEBUG_KMS("AUX Backlight Control Supported!\n"); + + return supported; } int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) { struct intel_panel *panel = &intel_connector->panel; - if (!i915.enable_dpcd_backlight) - return -ENODEV; - if (!intel_dp_aux_display_control_capable(intel_connector)) return -ENODEV;