From patchwork Tue Apr 18 23:48:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9686709 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EAFCB602C2 for ; Tue, 18 Apr 2017 23:48:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD1D928354 for ; Tue, 18 Apr 2017 23:48:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D1FCE2838E; Tue, 18 Apr 2017 23:48:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 89F5628354 for ; Tue, 18 Apr 2017 23:48:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 015EB6E23E; Tue, 18 Apr 2017 23:48:44 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pg0-x229.google.com (mail-pg0-x229.google.com [IPv6:2607:f8b0:400e:c05::229]) by gabe.freedesktop.org (Postfix) with ESMTPS id 80C8F6E231 for ; Tue, 18 Apr 2017 23:48:41 +0000 (UTC) Received: by mail-pg0-x229.google.com with SMTP id s64so3640927pgb.1 for ; Tue, 18 Apr 2017 16:48:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=YxjG2I9/f9afK+k0bGBNVwnswMDQeJSxzG9xl/Z4hRM=; b=iZXfc4IjBCvtparAJNpqTkfVFPVGy/0YDMXrP3WSyEQ7r6dWZqhTpxvp2HiWzaHeaZ luIX87MIQg4pH3To+PSMcuqu5nRzBJN/jjNnSZhsTOLPYkbrhmoC+I1d9F0D+eK57kUT +5q6G+UnCCx+ipfbyaRh0Pc4ZhUUqY9eiIYuF+HfduhYciZ/XBj1TvFpJtDULc6lEkBk rs/nbUMc0PA0NfSephf8vE8uhmbhmpjT6vEqXCd6uPZym8mIfoJgMu5HOb3RAa6ZfT9y hQkC2hSJheujtaav0d2tGhXR76p7mspkh1e4Y0Wla1LP2kGwBrE2XDQTZEI8nTIvLruM E8VQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=YxjG2I9/f9afK+k0bGBNVwnswMDQeJSxzG9xl/Z4hRM=; b=EsU60h9//LgjFW5NUXsysQ9+5RtA9ZRvGnY6zrbCbWxhWiLoRVC0M19AO5w0fVUKgl RmrBdq7+d1i0Sv8oU705zd5nZagtcZRNyBQCkdi9aAeSRVRFPsR87H8ZbumOaB9wwrOP ixtDoKtKuQ47EBlJi5EphMvStnlthlM1yH0Qa6SVkDo4/IqFyhsXjhQ9tpLMk6d0VK82 CEhyKDZDKEyXzPXxYEY/Ad5WubC+qOmZcEGfim1S1L3eHxwU9m6Y3862m8tsI1Kqq3KR fJe+ZAaWw1S08AJm9/RGTgqvja8a4mnVhZqjVVrl5JM2o+jMhdwr3/PcRiFdxBdO1i1S 8vcw== X-Gm-Message-State: AN3rC/5e8KgI+UuzbdurbqCofZxtUTWbwaF6Eq0kPqthZ26qryTVNo8y qZNpgt06p7GQByoC X-Received: by 10.84.229.2 with SMTP id b2mr51701plk.154.1492559320989; Tue, 18 Apr 2017 16:48:40 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([172.22.64.53]) by smtp.gmail.com with ESMTPSA id i73sm531630pfi.131.2017.04.18.16.48.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Apr 2017 16:48:40 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id C720511F905; Tue, 18 Apr 2017 16:48:37 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org, Jani Nikula Date: Tue, 18 Apr 2017 16:48:24 -0700 Message-Id: <20170418234824.157355-7-puthik@chromium.org> X-Mailer: git-send-email 2.12.2.816.g2cccc81164-goog In-Reply-To: <20170418234824.157355-1-puthik@chromium.org> References: <20170418234824.157355-1-puthik@chromium.org> Cc: Puthikorn Voravootivat Subject: [Intel-gfx] [PATCH RESEND v4 6/6] drm/i915: Set PWM divider to match desired frequency in vbt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Read desired PWM frequency from panel vbt and calculate the value for divider in DPCD address 0x724 and 0x728 to match that frequency as close as possible. Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index f99cf0a6ae44..9adc77bfb515 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -111,12 +111,60 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, dbc, sizeof(dbc)); } +/* + * Set PWM Frequency divider to match desired frequency in vbt. + * The PWM Frequency is calculated as 27Mhz / (F x P). + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) + */ +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + int freq, fxp, f; + u8 pn, pn_min, pn_max; + + /* Find desired value of (F x P) + * Note that, if F x P is out of supported range, the maximum value or + * minimum value will applied automatically. So no need to check that. + */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; + fxp = DP_EDP_BACKLIGHT_FREQ_BASE / freq; + + /* Use lowest possible value of Pn to try to make F to be between 1 and + * 255 while still in the range Pn_min and Pn_max + */ + if (!drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min)) { + return; + } + if (!drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max)) { + return; + } + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + f = fxp / (1 << pn_min); + for (pn = pn_min; pn < pn_max && f > 255; pn++) + f /= 2; + + /* Cap F to be in the range between 1 and 255. */ + f = min(f, 255); + f = max(f, 1); + + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, pn); + drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_FREQ_SET, (u8) f); +} + static void intel_dp_aux_enable_backlight(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); uint8_t dpcd_buf = 0; uint8_t new_dpcd_buf = 0; uint8_t edp_backlight_mode = 0; + bool freq_cap; set_aux_backlight_enable(intel_dp, true); @@ -147,10 +195,18 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) intel_dp_aux_set_dynamic_backlight_percent(intel_dp, 0, 100); } + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; + if (freq_cap) + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; + if (new_dpcd_buf != dpcd_buf) { drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf); } + + if (freq_cap) + intel_dp_aux_set_pwm_freq(connector); + intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); }