From patchwork Thu May 11 23:02:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9723225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B08FF60236 for ; Thu, 11 May 2017 23:02:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A869C28738 for ; Thu, 11 May 2017 23:02:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9D6F82873F; Thu, 11 May 2017 23:02:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 44C2B28738 for ; Thu, 11 May 2017 23:02:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7065A6E602; Thu, 11 May 2017 23:02:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pg0-x231.google.com (mail-pg0-x231.google.com [IPv6:2607:f8b0:400e:c05::231]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2E6FC6E5FA for ; Thu, 11 May 2017 23:02:42 +0000 (UTC) Received: by mail-pg0-x231.google.com with SMTP id u28so21308099pgn.1 for ; Thu, 11 May 2017 16:02:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=a0eoKUme9D/UwtUizutd1iy4EsE65EL9iIgqhnbDtKQ=; b=fgay9zf+XdIfvz9UMjEqYI3idc8PFuYIqOOeMNt4FA9nYsZ2K+40TlNdaoehfSPm8d 5PBveMxwlHU+8es2cAiutMypDDrYY/Ka6X5zZMSh3+StZQrkQKFsDmd85hdnvAT+uLL0 p1kEfu4kiTBFboEp7T9Yj25TNd1Xrw4nZozse3XgVG7s+v/3ygjXbBfJAZnhtt7ldQ+n Ye1wjEhxunFBfVg1t0aKdhrCD6OsdOGSATrh90gjZmsuV//UBD2KsuEbME+7POPPK94E Kea5RkFbVsnHUgFP5tEtMk9RL7lY64Tedal6fLxtv1TlfLB2tJhso8aVoGTFdU/dwerF J+Yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=a0eoKUme9D/UwtUizutd1iy4EsE65EL9iIgqhnbDtKQ=; b=uShhi11PY7GarFaOuRs7I3dAaWhKwA2FnoZWIn4xZciZvJHTJ1nZV1VEb1GVW7hqRb 2WaqGKX8KOTHYB19RvQfjTveXTQJfGFD/Gw64gLoQ2pjUc9pxkro1SLNr0aU6uVSk5pk 4e5Py4IsgxYahOGFl3SWn7R8/InYFcQm2GUQFxI2+G4NOHfCyAajcUzuwimNfWD/rmCL m+xL/4h9wSMZ6Epu3rRqioDxFQ/G28qvjfXtmLQ9xx/bWKAp87odUHDy8/03c5qv6P7Z 55STIip4krA2bOOTHcsQbxYyL9AgspGbKc0ppKZrlO3MNaSLCWaWc+c/IOOzeNIzgEMc zdsQ== X-Gm-Message-State: AODbwcCG/0mnpZXDfbeaCvGURT+zFsrKuqzMAlQS8vvIj+PaqikW5Af5 c5xgOeRuo61hF4k6 X-Received: by 10.99.120.206 with SMTP id t197mr1028050pgc.64.1494543761586; Thu, 11 May 2017 16:02:41 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([172.22.64.53]) by smtp.gmail.com with ESMTPSA id m8sm1914551pga.34.2017.05.11.16.02.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 May 2017 16:02:40 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id A208011F935; Thu, 11 May 2017 16:02:37 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org, Dhinakaran Pandiyan Date: Thu, 11 May 2017 16:02:25 -0700 Message-Id: <20170511230225.142870-10-puthik@chromium.org> X-Mailer: git-send-email 2.13.0.rc2.291.g57267f2277-goog In-Reply-To: <20170511230225.142870-1-puthik@chromium.org> References: <20170511230225.142870-1-puthik@chromium.org> Cc: Puthikorn Voravootivat , dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v7 9/9] drm/i915: Set PWM divider to match desired frequency in vbt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Read desired PWM frequency from panel vbt and calculate the value for divider in DPCD address 0x724 and 0x728 to have as many bits as possible for PWM duty cyle for granularity of brightness adjustment while the frequency is still within 25% of the desired frequency. Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 81 +++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index 0b48851013cc..6f10a2f1ab76 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -113,12 +113,86 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, } } +/* + * Set PWM Frequency divider to match desired frequency in vbt. + * The PWM Frequency is calculated as 27Mhz / (F x P). + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) + */ +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1; + u8 pn, pn_min, pn_max; + + /* Find desired value of (F x P) + * Note that, if F x P is out of supported range, the maximum value or + * minimum value will applied automatically. So no need to check that. + */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; + DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq); + if (!freq) { + DRM_DEBUG_KMS("Use panel default backlight frequency\n"); + return; + } + + fxp = KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ) / freq; + + /* Use highest possible value of Pn for more granularity of brightness + * adjustment while satifying the conditions below. + * - Pn is in the range of Pn_min and Pn_max + * - F is in the range of 1 and 255 + * - Effective frequency is within 25% of desired frequency. + */ + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) { + DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n"); + return; + } + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) { + DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n"); + return; + } + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + + fxp_min = fxp * 3 / 4; + fxp_max = fxp * 5 / 4; + if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) { + DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n"); + return; + } + + for (pn = pn_max; pn > pn_min; pn--) { + f = clamp(fxp >> pn, 1, 255); + fxp_actual = f << pn; + if (fxp_min <= fxp_actual && fxp_actual <= fxp_max) + break; + } + + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) { + DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); + return; + } + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight freq\n"); + return; + } +} + static void intel_dp_aux_enable_backlight(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); uint8_t dpcd_buf = 0; uint8_t new_dpcd_buf = 0; uint8_t edp_backlight_mode = 0; + bool freq_cap; if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) { @@ -151,6 +225,10 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) DRM_DEBUG_KMS("Enable dynamic brightness.\n"); } + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; + if (freq_cap) + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; + if (new_dpcd_buf != dpcd_buf) { if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf) < 0) { @@ -158,6 +236,9 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) } } + if (freq_cap) + intel_dp_aux_set_pwm_freq(connector); + set_aux_backlight_enable(intel_dp, true); intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); }