diff mbox

drm/i915: Move engine HWS setup into dedicated function

Message ID 20170515185048.2040-1-michal.wajdeczko@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michal Wajdeczko May 15, 2017, 6:50 p.m. UTC 
This will make future patches simpler.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Oscar Mateo <oscar.mateo@intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

Comments

Chris Wilson May 15, 2017, 7:48 p.m. UTC | #1 
On Mon, May 15, 2017 at 07:08:00PM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Move engine HWS setup into dedicated function
> URL   : https://patchwork.freedesktop.org/series/24462/
> State : success
> 
> == Summary ==
> 
> Series 24462v1 drm/i915: Move engine HWS setup into dedicated function
> https://patchwork.freedesktop.org/api/1.0/series/24462/revisions/1/mbox/

This isn't moving just HWS setup, so the new function is a little
misnamed.
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 9a1192d..7782619 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1142,9 +1142,20 @@  static int intel_init_workaround_bb(struct intel_engine_cs *engine)
 	return ret;
 }
 
-static int gen8_init_common_ring(struct intel_engine_cs *engine)
+static void intel_engine_init_hws(struct intel_engine_cs *engine)
 {
 	struct drm_i915_private *dev_priv = engine->i915;
+
+	I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
+	I915_WRITE(RING_MODE_GEN7(engine),
+		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
+	I915_WRITE(RING_HWS_PGA(engine->mmio_base),
+		   engine->status_page.ggtt_offset);
+	POSTING_READ(RING_HWS_PGA(engine->mmio_base));
+}
+
+static int gen8_init_common_ring(struct intel_engine_cs *engine)
+{
 	struct execlist_port *port = engine->execlist_port;
 	unsigned int n;
 	int ret;
@@ -1155,13 +1166,7 @@  static int gen8_init_common_ring(struct intel_engine_cs *engine)
 
 	intel_engine_reset_breadcrumbs(engine);
 	intel_engine_init_hangcheck(engine);
-
-	I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
-	I915_WRITE(RING_MODE_GEN7(engine),
-		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
-	I915_WRITE(RING_HWS_PGA(engine->mmio_base),
-		   engine->status_page.ggtt_offset);
-	POSTING_READ(RING_HWS_PGA(engine->mmio_base));
+	intel_engine_init_hws(engine);
 
 	DRM_DEBUG_DRIVER("Execlists enabled for %s\n", engine->name);