From patchwork Tue May 23 22:38:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Puthikorn Voravootivat X-Patchwork-Id: 9744389 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9B48D6032B for ; Tue, 23 May 2017 22:38:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8DEBC28818 for ; Tue, 23 May 2017 22:38:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 812BF2885E; Tue, 23 May 2017 22:38:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F38192885B for ; Tue, 23 May 2017 22:38:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6EFFF6E396; Tue, 23 May 2017 22:38:16 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pf0-x229.google.com (mail-pf0-x229.google.com [IPv6:2607:f8b0:400e:c00::229]) by gabe.freedesktop.org (Postfix) with ESMTPS id 103886E392 for ; Tue, 23 May 2017 22:38:15 +0000 (UTC) Received: by mail-pf0-x229.google.com with SMTP id n23so127572787pfb.2 for ; Tue, 23 May 2017 15:38:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=WsMVr4/lgl5g9zAjlINK/vXu09clCFzqaJXRNF2IumQ=; b=AJOkRQ51uFM7EHIvxaLuzxsCKJchUOq3CA6zwIPRs47IHZkDgDG1vCL4GApPhF+LXn v+Rl2RtpgWUTDmiB4WvDdzh2mZTPHZHw218vg5oqgHyaSgoy68/xFCahn8PL2DeWZmzQ qPvVi+PIYBwqlLklYsxih0PWqSFeRJY2FBP9Knwi48vmNdZgK1RsviyUxeAJcY74nS6p UJBJkK4jMqHhvezVvUiyH3HQgt5PiM+ZpnOqBOgZIguikG97GFSEb10GedoYjZbmRtuM B3LITUIA5WY3PMsgB42fAdiNQE9YWXvV9wIfNBu8qX31KwQ149wYW0ghQxjhhRdbj1Aa Zelg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=WsMVr4/lgl5g9zAjlINK/vXu09clCFzqaJXRNF2IumQ=; b=QLlNN/UPXYSYQLCFniFXGFpJW8yYKQPg2rjMzrOWZE/m0yQ0Q65LahMlBUU7yQkgsE U1NdVkCQOObsmbQsefQAqyWx/Ve9Qq1vtqQILJfkpKZvPUc/14i2YQUR1A1C3SyPVzxx y4AbnQuHXj1loiqYRv8w8Xkm/MkPKb5l1dWSEfiPwsynvzbtHk07Koc+Uu4U0qfoDcf1 d7xfk90W+CD98jp8S7OlHGJdXOvA1kparMv9AXH9dj7vmD/zb4t+4kc4+0ESfodlziZa kpBV+It+QII5uXdaJVRVRShwYEoEtqYF4uo+rcsMN1+GYPid8hTiGeNM44Wwu76hipDt +Usw== X-Gm-Message-State: AODbwcDo3E6FPjKIsZF4vtvxm8sBi9j4SOxRS1CjXdhr3DLYXEQihuxR FTcYwt4GnbdBnHDp X-Received: by 10.98.92.67 with SMTP id q64mr11918765pfb.117.1495579094432; Tue, 23 May 2017 15:38:14 -0700 (PDT) Received: from puthik2.mtv.corp.google.com ([2620:0:1000:1301:1057:ae23:f7e3:c8c7]) by smtp.gmail.com with ESMTPSA id y20sm2739546pfb.93.2017.05.23.15.38.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 May 2017 15:38:13 -0700 (PDT) Received: by puthik2.mtv.corp.google.com (Postfix, from userid 218808) id 79FC211F860; Tue, 23 May 2017 15:38:12 -0700 (PDT) From: Puthikorn Voravootivat To: intel-gfx@lists.freedesktop.org, Dhinakaran Pandiyan , Jani Nikula Date: Tue, 23 May 2017 15:38:05 -0700 Message-Id: <20170523223805.46372-6-puthik@chromium.org> X-Mailer: git-send-email 2.13.0.219.gdb65acc882-goog In-Reply-To: <20170523223805.46372-1-puthik@chromium.org> References: <20170523223805.46372-1-puthik@chromium.org> Cc: Puthikorn Voravootivat , dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v9 5/5] drm/i915: Set PWM divider to match desired frequency in vbt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Read desired PWM frequency from panel vbt and calculate the value for divider in DPCD address 0x724 and 0x728 to have as many bits as possible for PWM duty cyle for granularity of brightness adjustment while the frequency divisor is still within 25% of the desired value. Signed-off-by: Puthikorn Voravootivat --- drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 82 +++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c index f1b7855a2d2a..b7cd44550127 100644 --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c @@ -116,10 +116,85 @@ intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp, } } +/* + * Set PWM Frequency divider to match desired frequency in vbt. + * The PWM Frequency is calculated as 27Mhz / (F x P). + * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the + * EDP_BACKLIGHT_FREQ_SET register (DPCD Address 00728h) + * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the + * EDP_PWMGEN_BIT_COUNT register (DPCD Address 00724h) + */ +static void intel_dp_aux_set_pwm_freq(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); + int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1; + u8 pn, pn_min, pn_max; + + /* Find desired value of (F x P) + * Note that, if F x P is out of supported range, the maximum value or + * minimum value will applied automatically. So no need to check that. + */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; + DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq); + if (!freq) { + DRM_DEBUG_KMS("Use panel default backlight frequency\n"); + return; + } + + fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq); + + /* Use highest possible value of Pn for more granularity of brightness + * adjustment while satifying the conditions below. + * - Pn is in the range of Pn_min and Pn_max + * - F is in the range of 1 and 255 + * - FxP is within 25% of desired value. + * Note: 25% is arbitrary value and may need some tweak. + */ + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) { + DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n"); + return; + } + if (drm_dp_dpcd_readb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) { + DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n"); + return; + } + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; + + fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); + fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); + if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) { + DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n"); + return; + } + + for (pn = pn_max; pn >= pn_min; pn--) { + f = clamp(DIV_ROUND_CLOSEST(fxp , 1 << pn), 1, 255); + fxp_actual = f << pn; + if (fxp_min <= fxp_actual && fxp_actual <= fxp_max) + break; + } + + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) { + DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); + return; + } + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight freq\n"); + return; + } +} + static void intel_dp_aux_enable_backlight(struct intel_connector *connector) { struct intel_dp *intel_dp = enc_to_intel_dp(&connector->encoder->base); uint8_t dpcd_buf, new_dpcd_buf, edp_backlight_mode; + bool freq_cap; if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &dpcd_buf) != 1) { @@ -152,6 +227,10 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) DRM_DEBUG_KMS("Enable dynamic brightness.\n"); } + freq_cap = intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP; + if (freq_cap) + new_dpcd_buf |= DP_EDP_BACKLIGHT_FREQ_AUX_SET_ENABLE; + if (new_dpcd_buf != dpcd_buf) { if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, new_dpcd_buf) < 0) { @@ -159,6 +238,9 @@ static void intel_dp_aux_enable_backlight(struct intel_connector *connector) } } + if (freq_cap) + intel_dp_aux_set_pwm_freq(connector); + set_aux_backlight_enable(intel_dp, true); intel_dp_aux_set_backlight(connector, connector->panel.backlight.level); }