From patchwork Tue Jun 13 13:11:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Mahesh" X-Patchwork-Id: 9783803 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B9909602DC for ; Tue, 13 Jun 2017 13:08:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC28728557 for ; Tue, 13 Jun 2017 13:08:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A10C828591; Tue, 13 Jun 2017 13:08:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E0A7628557 for ; Tue, 13 Jun 2017 13:08:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 452ED6E2E8; Tue, 13 Jun 2017 13:08:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7779C6E2EA for ; Tue, 13 Jun 2017 13:08:23 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP; 13 Jun 2017 06:08:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.39,338,1493708400"; d="scan'208"; a="1159905947" Received: from unknown (HELO localhost.localdomain) ([10.223.25.241]) by fmsmga001.fm.intel.com with ESMTP; 13 Jun 2017 06:08:21 -0700 From: Mahesh Kumar To: intel-gfx@lists.freedesktop.org Date: Tue, 13 Jun 2017 18:41:58 +0530 Message-Id: <20170613131202.4492-6-mahesh1.kumar@intel.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170613131202.4492-1-mahesh1.kumar@intel.com> References: <20170613131202.4492-1-mahesh1.kumar@intel.com> Cc: paulo.r.zanoni@intel.com, maarten.lankhorst@intel.com Subject: [Intel-gfx] [PATCH 5/9] drm/i915/hsw: use intel_compute_linetime_wm function for linetime wm X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP linetime wm is time taken to fill a single display line with given clock rate, multiplied by 8. This patch reuses the common code of hsw_compute_linetime_wm & skl_compute_linetime_wm. Changes since V1: - don't expose intel_compute_linetime_wm out of intel_pm.c (Maarten) Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/intel_pm.c | 66 ++++++++++++++++++++++------------------- 1 file changed, 36 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 155f54a1f516..be65c0b01469 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2727,6 +2727,40 @@ static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv, result->enable = true; } +static uint_fixed_16_16_t +intel_get_linetime_us(const struct intel_crtc_state *cstate) +{ + uint32_t pixel_rate; + uint32_t crtc_htotal; + uint_fixed_16_16_t linetime_us; + + if (!cstate->base.active) + return u32_to_fixed16(0); + + pixel_rate = cstate->pixel_rate; + + if (WARN_ON(pixel_rate == 0)) + return u32_to_fixed16(0); + + crtc_htotal = cstate->base.adjusted_mode.crtc_htotal; + linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate); + + return linetime_us; +} + +static uint32_t +intel_compute_linetime_wm(const struct intel_crtc_state *cstate) +{ + uint_fixed_16_16_t linetime_us; + + linetime_us = intel_get_linetime_us(cstate); + + if (is_fixed16_zero(linetime_us)) + return 0; + + return fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); +} + static uint32_t hsw_compute_linetime_wm(const struct intel_crtc_state *cstate) { @@ -2746,8 +2780,7 @@ hsw_compute_linetime_wm(const struct intel_crtc_state *cstate) /* The WM are computed with base on how long it takes to fill a single * row at the given clock rate, multiplied by 8. * */ - linetime = DIV_ROUND_CLOSEST(adjusted_mode->crtc_htotal * 1000 * 8, - adjusted_mode->crtc_clock); + linetime = intel_compute_linetime_wm(cstate); ips_linetime = DIV_ROUND_CLOSEST(adjusted_mode->crtc_htotal * 1000 * 8, intel_state->cdclk.logical.cdclk); @@ -4381,27 +4414,6 @@ static uint_fixed_16_16_t skl_wm_method2(uint32_t pixel_rate, return ret; } -static uint_fixed_16_16_t -intel_get_linetime_us(struct intel_crtc_state *cstate) -{ - uint32_t pixel_rate; - uint32_t crtc_htotal; - uint_fixed_16_16_t linetime_us; - - if (!cstate->base.active) - return u32_to_fixed16(0); - - pixel_rate = cstate->pixel_rate; - - if (WARN_ON(pixel_rate == 0)) - return u32_to_fixed16(0); - - crtc_htotal = cstate->base.adjusted_mode.crtc_htotal; - linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate); - - return linetime_us; -} - static uint32_t skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *cstate, const struct intel_plane_state *pstate) @@ -4609,15 +4621,9 @@ skl_compute_linetime_wm(struct intel_crtc_state *cstate) { struct drm_atomic_state *state = cstate->base.state; struct drm_i915_private *dev_priv = to_i915(state->dev); - uint_fixed_16_16_t linetime_us; uint32_t linetime_wm; - linetime_us = intel_get_linetime_us(cstate); - - if (is_fixed16_zero(linetime_us)) - return 0; - - linetime_wm = fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); + linetime_wm = intel_compute_linetime_wm(cstate); /* Display WA #1135: bxt. */ if (IS_BROXTON(dev_priv) && dev_priv->ipc_enabled)