From patchwork Tue Jun 20 18:25:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michel Thierry X-Patchwork-Id: 9800075 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A1839601BC for ; Tue, 20 Jun 2017 18:25:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A5F2E28294 for ; Tue, 20 Jun 2017 18:25:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A3EF283A6; Tue, 20 Jun 2017 18:25:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5B65928294 for ; Tue, 20 Jun 2017 18:25:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8775E6E3BE; Tue, 20 Jun 2017 18:25:09 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id BCE976E33E for ; Tue, 20 Jun 2017 18:25:07 +0000 (UTC) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jun 2017 11:25:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.39,364,1493708400"; d="scan'208"; a="1162710098" Received: from relo-linux-11.sc.intel.com ([10.3.160.214]) by fmsmga001.fm.intel.com with ESMTP; 20 Jun 2017 11:25:02 -0700 From: Michel Thierry To: intel-gfx@lists.freedesktop.org Date: Tue, 20 Jun 2017 11:25:02 -0700 Message-Id: <20170620182502.28553-3-michel.thierry@intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170620182502.28553-1-michel.thierry@intel.com> References: <20170620182502.28553-1-michel.thierry@intel.com> Subject: [Intel-gfx] [PATCH i-g-t 3/3] tests/gem_reset_stats: Enforce full chip reset mode before run X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Platforms with per-engine reset enabled (i915.reset=2) are unlikely to perform a full chip reset, keeping the reset_count unmodified. In order to keep the expectations of this test, enforce that full GPU reset is enabled (i915.reset=1). Later on, we can expand the reset_stats ioctl to also return the number of per-engine resets and use reset_count + reset_engine_count when checking for the updated reset count. Signed-off-by: Michel Thierry Acked-by: Arkadiusz Hiler --- tests/gem_reset_stats.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/tests/gem_reset_stats.c b/tests/gem_reset_stats.c index 73afeeb2..6777868f 100644 --- a/tests/gem_reset_stats.c +++ b/tests/gem_reset_stats.c @@ -27,6 +27,8 @@ #define _GNU_SOURCE #include "igt.h" +#include "igt_sysfs.h" +#include #include #include #include @@ -777,15 +779,23 @@ igt_main int fd; bool has_reset_stats; + bool using_full_reset; fd = drm_open_driver(DRIVER_INTEL); devid = intel_get_drm_devid(fd); has_reset_stats = gem_has_reset_stats(fd); + igt_assert(igt_sysfs_set_parameter + (fd, "reset", "%d", 1 /* only global reset */)); + + using_full_reset = (gem_gpu_reset_type(fd) == 1); + close(fd); igt_require_f(has_reset_stats, "No reset stats ioctl support. Too old kernel?\n"); + igt_require_f(using_full_reset, + "Full GPU reset is not enabled. Is enable_hangcheck set?\n"); } igt_subtest("params") @@ -831,4 +841,13 @@ igt_main igt_subtest_f("defer-hangcheck-%s", e->name) RUN_TEST(defer_hangcheck(e)); } + + igt_fixture { + int fd; + + fd = drm_open_driver(DRIVER_INTEL); + igt_assert(igt_sysfs_set_parameter + (fd, "reset", "%d", INT_MAX /* any reset method */)); + close(fd); + } }