| Message ID | 20170807161430.23308-15-michal.wajdeczko@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 08/07/2017 09:14 AM, Michal Wajdeczko wrote: > We will need them in G2H communication to properly handle > responses and requests from the Guc. > > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Oscar Mateo <oscar.mateo@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Michel Thierry <michel.thierry@intel.com> > --- > drivers/gpu/drm/i915/i915_guc_submission.c | 2 +- > drivers/gpu/drm/i915/intel_uc.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c > index 48a1e93..509497e 100644 > --- a/drivers/gpu/drm/i915/i915_guc_submission.c > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c > @@ -1328,7 +1328,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) > if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) > return 0; > > - if (i915.guc_log_level >= 0) > + if (HAS_GUC_CT(dev_priv) || i915.guc_log_level >= 0) > gen9_enable_guc_interrupts(dev_priv); > > ctx = dev_priv->kernel_context; > diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c > index 774d740..0209ad0 100644 > --- a/drivers/gpu/drm/i915/intel_uc.c > +++ b/drivers/gpu/drm/i915/intel_uc.c > @@ -395,7 +395,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) > > intel_guc_auth_huc(dev_priv); > if (i915.enable_guc_submission) { > - if (i915.guc_log_level >= 0) > + if (HAS_GUC_CT(dev_priv) || i915.guc_log_level >= 0) > gen9_enable_guc_interrupts(dev_priv); > > ret = i915_guc_submission_enable(dev_priv); Is this enough? There are also gen9_disable_guc_interrupts that will break CTB (e.g. when logs get disabled).
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 48a1e93..509497e 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1328,7 +1328,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (i915.guc_log_level >= 0) + if (HAS_GUC_CT(dev_priv) || i915.guc_log_level >= 0) gen9_enable_guc_interrupts(dev_priv); ctx = dev_priv->kernel_context; diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 774d740..0209ad0 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -395,7 +395,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) intel_guc_auth_huc(dev_priv); if (i915.enable_guc_submission) { - if (i915.guc_log_level >= 0) + if (HAS_GUC_CT(dev_priv) || i915.guc_log_level >= 0) gen9_enable_guc_interrupts(dev_priv); ret = i915_guc_submission_enable(dev_priv);
We will need them in G2H communication to properly handle responses and requests from the Guc. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> --- drivers/gpu/drm/i915/i915_guc_submission.c | 2 +- drivers/gpu/drm/i915/intel_uc.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)