Message ID | 20170814074140.23151-2-zhenyuw@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Quoting Zhenyu Wang (2017-08-14 08:41:38) > From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > Configurations like virtualized environments may support only 48 bit > ppGTT without supporting 32 bit ppGTT. Support this by disconnecting > the relationship of the two feature bits. > > Cc: Tina Zhang <tina.zhang@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Zhi Wang <zhi.a.wang@intel.com> > Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> I was under the impression that the previous conflicting patch was already en route. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 10aa7762d9a6..a5eada1b93c5 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -180,10 +180,15 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv, return 0; } - if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists && has_full_ppgtt) - return has_full_48bit_ppgtt ? 3 : 2; - else - return has_aliasing_ppgtt ? 1 : 0; + if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists) { + if (has_full_48bit_ppgtt) + return 3; + + if (has_full_ppgtt) + return 2; + } + + return has_aliasing_ppgtt ? 1 : 0; } static int ppgtt_bind_vma(struct i915_vma *vma,