From patchwork Fri Sep 29 12:58:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Petri Latvala X-Patchwork-Id: 9977973 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0480F60311 for ; Fri, 29 Sep 2017 12:58:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E68EE2984F for ; Fri, 29 Sep 2017 12:58:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB86F29865; Fri, 29 Sep 2017 12:58:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 437992984F for ; Fri, 29 Sep 2017 12:58:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A5316EB2E; Fri, 29 Sep 2017 12:58:38 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id CCF0B6E133 for ; Fri, 29 Sep 2017 12:58:37 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP; 29 Sep 2017 05:58:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,452,1500966000"; d="scan'208";a="317672191" Received: from thrakatuluk.fi.intel.com (HELO thrakatuluk) ([10.237.68.137]) by fmsmga004.fm.intel.com with ESMTP; 29 Sep 2017 05:58:36 -0700 Received: from platvala by thrakatuluk with local (Exim 4.89) (envelope-from ) id 1dxusF-0006iu-8g; Fri, 29 Sep 2017 15:58:35 +0300 Date: Fri, 29 Sep 2017 15:58:35 +0300 From: Petri Latvala To: Tvrtko Ursulin Message-ID: <20170929125835.n3pbdgz4tupswryq@platvala-desk.ger.corp.intel.com> References: <20170929123939.3312-1-tvrtko.ursulin@linux.intel.com> <20170929123939.3312-6-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20170929123939.3312-6-tvrtko.ursulin@linux.intel.com> User-Agent: NeoMutt/20170609 (1.8.3) Cc: Intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH i-g-t 5/7] tests/perf_pmu: Tests for i915 PMU API X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Sep 29, 2017 at 01:39:37PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > A bunch of tests for the new i915 PMU feature. > > Parts of the code were initialy sketched by Dmitry Rogozhkin. > > v2: (Most suggestions by Chris Wilson) > * Add new class/instance based engine list. > * Add gem_has_engine/gem_require_engine to work with class/instance. > * Use the above two throughout the test. > * Shorten tests to 100ms busy batches, seems enough. > * Add queued counter sanity checks. > * Use igt_nsec_elapsed. > * Skip on perf -ENODEV in some tests instead of embedding knowledge locally. > * Fix multi ordering for busy accounting. > * Use new guranteed_usleep when sleep time is asserted on. > * Check for no queued when idle/busy. > * Add queued counter init test. > * Add queued tests. > * Consolidate and increase multiple busy engines tests to most-busy and > all-busy tests. > * Guarantte interrupts by using fences. > * Test RC6 via forcewake. > > v3: > * Tweak assert in interrupts subtest. > * Sprinkle of comments. > * Fix multi-client test which got broken in v2. > > v4: > * Measured instead of guaranteed sleep. > * Missing sync in no_sema. > * Log busyness before asserts for debug. > * access(2) instead of open(2) to determine if cpu0 is hotpluggable. > * Test frequency reporting via min/max setting instead assuming. > ^^ All above suggested by Chris Wilson. ^^ > * Drop queued subtests to match i915. > * Use long batches with fences to ensure interrupts. > * Test render node as well. > > Signed-off-by: Tvrtko Ursulin > Cc: Chris Wilson > Cc: Dmitry Rogozhkin > --- > lib/igt_gt.c | 50 +++ > lib/igt_gt.h | 38 ++ > lib/igt_perf.h | 9 +- > tests/Makefile.am | 1 + > tests/Makefile.sources | 1 + > tests/perf_pmu.c | 957 +++++++++++++++++++++++++++++++++++++++++++++++++ > 6 files changed, 1048 insertions(+), 8 deletions(-) > create mode 100644 tests/perf_pmu.c > > diff --git a/lib/igt_gt.c b/lib/igt_gt.c > index b3f3b3809eee..4c75811fb1b3 100644 > --- a/lib/igt_gt.c > +++ b/lib/igt_gt.c > @@ -568,3 +568,53 @@ bool gem_can_store_dword(int fd, unsigned int engine) > > return true; > } > + > +const struct intel_execution_engine2 intel_execution_engines2[] = { > + { "rcs0", I915_ENGINE_CLASS_RENDER, 0 }, > + { "bcs0", I915_ENGINE_CLASS_COPY, 0 }, > + { "vcs0", I915_ENGINE_CLASS_VIDEO, 0 }, > + { "vcs1", I915_ENGINE_CLASS_VIDEO, 1 }, > + { "vecs0", I915_ENGINE_CLASS_VIDEO_ENHANCE, 0 }, > +}; > + > +unsigned int > +gem_class_instance_to_eb_flags(int gem_fd, > + enum drm_i915_gem_engine_class class, > + unsigned int instance) > +{ > + if (class != I915_ENGINE_CLASS_VIDEO) > + igt_assert(instance == 0); > + else > + igt_assert(instance >= 0 && instance <= 1); > + > + switch (class) { > + case I915_ENGINE_CLASS_RENDER: > + return I915_EXEC_RENDER; > + case I915_ENGINE_CLASS_COPY: > + return I915_EXEC_BLT; > + case I915_ENGINE_CLASS_VIDEO: > + if (instance == 0) { > + if (gem_has_bsd2(gem_fd)) > + return I915_EXEC_BSD | I915_EXEC_BSD_RING1; > + else > + return I915_EXEC_BSD; > + > + } else { > + return I915_EXEC_BSD | I915_EXEC_BSD_RING2; > + } > + case I915_ENGINE_CLASS_VIDEO_ENHANCE: > + return I915_EXEC_VEBOX; > + case I915_ENGINE_CLASS_OTHER: > + default: > + igt_assert(0); > + }; > +} > + > +bool gem_has_engine(int gem_fd, > + enum drm_i915_gem_engine_class class, > + unsigned int instance) > +{ > + return gem_has_ring(gem_fd, > + gem_class_instance_to_eb_flags(gem_fd, class, > + instance)); > +} > diff --git a/lib/igt_gt.h b/lib/igt_gt.h > index 2579cbd37be7..fb67ae1a7d1f 100644 > --- a/lib/igt_gt.h > +++ b/lib/igt_gt.h > @@ -25,6 +25,7 @@ > #define IGT_GT_H > > #include "igt_debugfs.h" > +#include "igt_core.h" > > void igt_require_hang_ring(int fd, int ring); > > @@ -80,4 +81,41 @@ extern const struct intel_execution_engine { > > bool gem_can_store_dword(int fd, unsigned int engine); > > +extern const struct intel_execution_engine2 { > + const char *name; > + int class; > + int instance; > +} intel_execution_engines2[]; > + > +#define for_each_engine_class_instance(fd__, e__) \ > + for ((e__) = intel_execution_engines2;\ > + (e__)->name; \ > + (e__)++) > + > +enum drm_i915_gem_engine_class { > + I915_ENGINE_CLASS_OTHER = 0, > + I915_ENGINE_CLASS_RENDER = 1, > + I915_ENGINE_CLASS_COPY = 2, > + I915_ENGINE_CLASS_VIDEO = 3, > + I915_ENGINE_CLASS_VIDEO_ENHANCE = 4, > + I915_ENGINE_CLASS_MAX /* non-ABI */ > +}; > + > +unsigned int > +gem_class_instance_to_eb_flags(int gem_fd, > + enum drm_i915_gem_engine_class class, > + unsigned int instance); > + > +bool gem_has_engine(int gem_fd, > + enum drm_i915_gem_engine_class class, > + unsigned int instance); > + > +static inline > +void gem_require_engine(int gem_fd, > + enum drm_i915_gem_engine_class class, > + unsigned int instance) > +{ > + igt_require(gem_has_engine(gem_fd, class, instance)); > +} > + > #endif /* IGT_GT_H */ > diff --git a/lib/igt_perf.h b/lib/igt_perf.h > index e38171da5261..dc4df760f531 100644 > --- a/lib/igt_perf.h > +++ b/lib/igt_perf.h > @@ -29,14 +29,7 @@ > > #include > > -enum drm_i915_gem_engine_class { > - I915_ENGINE_CLASS_OTHER = 0, > - I915_ENGINE_CLASS_RENDER = 1, > - I915_ENGINE_CLASS_COPY = 2, > - I915_ENGINE_CLASS_VIDEO = 3, > - I915_ENGINE_CLASS_VIDEO_ENHANCE = 4, > - I915_ENGINE_CLASS_MAX /* non-ABI */ > -}; > +#include "igt_gt.h" > > enum drm_i915_pmu_engine_sample { > I915_SAMPLE_BUSY = 0, > diff --git a/tests/Makefile.am b/tests/Makefile.am > index 1cea4036d00f..2819df381df7 100644 > --- a/tests/Makefile.am > +++ b/tests/Makefile.am > @@ -126,6 +126,7 @@ gen7_forcewake_mt_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) > gen7_forcewake_mt_LDADD = $(LDADD) -lpthread > gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) > gem_userptr_blits_LDADD = $(LDADD) -lpthread > +perf_pmu_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la > > gem_wait_LDADD = $(LDADD) -lrt > kms_flip_LDADD = $(LDADD) -lrt -lpthread > diff --git a/tests/Makefile.sources b/tests/Makefile.sources > index 0adc28a014d2..7d1fdf16892d 100644 > --- a/tests/Makefile.sources > +++ b/tests/Makefile.sources > @@ -217,6 +217,7 @@ TESTS_progs = \ > kms_vblank \ > meta_test \ > perf \ > + perf_pmu \ > pm_backlight \ > pm_lpsp \ > pm_rc6_residency \ For meson: # patchwork please this is not a new revision # diff --git a/tests/meson.build b/tests/meson.build index 53d02d13..50a97785 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -197,6 +197,7 @@ test_progs = [ 'kms_vblank', 'meta_test', 'perf', + 'perf_pmu', 'pm_backlight', 'pm_lpsp', 'pm_rc6_residency',