Message ID | 20171019183619.6235-5-michal.winiarski@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Quoting Michał Winiarski (2017-10-19 19:36:09) > Now that we're handling request resubmission the same way as regular > submission (from the tasklet), we can move GuC initialization earlier, > before restarting the engines. This way, we're no longer being in the > state of flux during engine restart - we're already in user requested > submission mode. > > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Michel Thierry <michel.thierry@intel.com> > Cc: Mika Kuoppala <mika.kuoppala@intel.com> > Cc: Oscar Mateo <oscar.mateo@intel.com> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> I've picked this one for dinq, any others you feel are not part of preemption per-se and would like to push ahead of the main series? Though it looks like preemption is robust, so maybe there won't be much of a delay now? -Chris
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index d699ea3ab80b..ef14c6d570dc 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4881,6 +4881,11 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) goto out; } + /* We can't enable contexts until all firmware is loaded */ + ret = intel_uc_init_hw(dev_priv); + if (ret) + goto out; + /* Need to do basic initialisation of all rings first: */ ret = __i915_gem_restart_engines(dev_priv); if (ret) @@ -4888,11 +4893,6 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) intel_mocs_init_l3cc_table(dev_priv); - /* We can't enable contexts until all firmware is loaded */ - ret = intel_uc_init_hw(dev_priv); - if (ret) - goto out; - out: intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); return ret; diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index 7097d81f4ac2..0bd1fcffa78d 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -1189,14 +1189,7 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv) for_each_engine(engine, dev_priv, id) { struct intel_engine_execlists * const execlists = &engine->execlists; - /* The tasklet was initialised by execlists, and may be in - * a state of flux (across a reset) and so we just want to - * take over the callback without changing any other state - * in the tasklet. - */ execlists->irq_tasklet.func = i915_guc_irq_handler; - clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted); - tasklet_schedule(&execlists->irq_tasklet); } return 0; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 7f45dd7dc3e5..a1e177258e3c 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1463,7 +1463,7 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine) execlists->preempt = false; /* After a GPU reset, we may have requests to replay */ - if (!i915_modparams.enable_guc_submission && execlists->first) + if (execlists->first) tasklet_schedule(&execlists->irq_tasklet); return 0;