From patchwork Thu Nov 9 00:31:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 10049807 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E36EA601EB for ; Thu, 9 Nov 2017 00:29:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D5B332982D for ; Thu, 9 Nov 2017 00:29:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CAA182983C; Thu, 9 Nov 2017 00:29:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8DAFC2982D for ; Thu, 9 Nov 2017 00:29:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 960746E7DA; Thu, 9 Nov 2017 00:29:54 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E6116E7DA for ; Thu, 9 Nov 2017 00:29:53 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP; 08 Nov 2017 16:29:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,365,1505804400"; d="scan'208";a="334134572" Received: from invictus.jf.intel.com ([10.54.75.152]) by fmsmga004.fm.intel.com with ESMTP; 08 Nov 2017 16:29:53 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Nov 2017 16:31:52 -0800 Message-Id: <20171109003152.5400-2-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20171109003152.5400-1-radhakrishna.sripada@intel.com> References: <20171109003152.5400-1-radhakrishna.sripada@intel.com> MIME-Version: 1.0 Cc: Paulo Zanoni Subject: [Intel-gfx] [RESEND v2 2/2] drm/i915: Allow "max bpc" property to limit pipe_bpp X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: "Sripada, Radhakrishna" Use the newly added "max bpc" connector property to limit pipe bpp. Cc: Ville Syrjälä Cc: Paulo Zanoni Cc: Manasi Navare Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 737de251d0f8..4a3359f19b82 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -10510,6 +10510,28 @@ connected_sink_compute_bpp(struct intel_connector *connector, } } +static void +connected_sink_max_bpp(struct intel_digital_connector_state *intel_conn_state, + struct intel_crtc_state *pipe_config) +{ + switch (intel_conn_state->max_bpc) { + case 8: + case 9: + pipe_config->pipe_bpp = 8*3; + break; + case 10: + case 11: + pipe_config->pipe_bpp = 10*3; + break; + case 12: + pipe_config->pipe_bpp = 12*3; + break; + default: + break; + } + DRM_DEBUG_KMS("Limiting display bpp to %d\n", pipe_config->pipe_bpp); +} + static int compute_baseline_pipe_bpp(struct intel_crtc *crtc, struct intel_crtc_state *pipe_config) @@ -10518,6 +10540,7 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, struct drm_atomic_state *state; struct drm_connector *connector; struct drm_connector_state *connector_state; + struct intel_digital_connector_state *intel_conn_state; int bpp, i; if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || @@ -10538,6 +10561,10 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc, if (connector_state->crtc != &crtc->base) continue; + intel_conn_state = to_intel_digital_connector_state(connector_state); + if (intel_conn_state->max_bpc) + connected_sink_max_bpp(intel_conn_state, pipe_config); + connected_sink_compute_bpp(to_intel_connector(connector), pipe_config); }