From patchwork Fri Nov 10 13:33:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liviu Dudau X-Patchwork-Id: 10053185 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E2D0360365 for ; Fri, 10 Nov 2017 13:33:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D0A2B2B021 for ; Fri, 10 Nov 2017 13:33:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C57C12B046; Fri, 10 Nov 2017 13:33:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 804E92B021 for ; Fri, 10 Nov 2017 13:33:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D2DA6EA82; Fri, 10 Nov 2017 13:33:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7C3C96EA61; Fri, 10 Nov 2017 13:33:23 +0000 (UTC) Received: from e110455-lin.cambridge.arm.com (e110455-lin.cambridge.arm.com [10.2.131.36]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id vAADXAgT011315; Fri, 10 Nov 2017 13:33:10 GMT From: Liviu Dudau To: Laurent Pinchart Date: Fri, 10 Nov 2017 13:33:10 +0000 Message-Id: <20171110133310.1225-1-Liviu.Dudau@arm.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <2213365.Z1vsgl9bDt@avalon> References: <2213365.Z1vsgl9bDt@avalon> Cc: David Airlie , intel-gfx@lists.freedesktop.org, LKML , DRI-devel , Mali DP Maintainers , Daniel Vetter Subject: [Intel-gfx] [PATCH v2] drm: gem_cma_helper.c: Allow importing of contiguous scatterlists with nents > 1 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP drm_gem_cma_prime_import_sg_table() will fail if the number of entries in the sg_table > 1. However, you can have a device that uses an IOMMU engine and can map a discontiguous buffer with multiple entries that have consecutive sg_dma_addresses, effectively making it contiguous. Allow for that scenario by testing the entries in the sg_table for contiguous coverage. Reviewed-by: Laurent Pinchart Signed-off-by: Liviu Dudau --- Laurent, Thanks for the review! I would like to ask for one more favour: if you are OK with this version, can you pull this patch through the drm-misc tree? Many thanks, Liviu drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++-- include/drm/drm_gem_cma_helper.h | 4 +++- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d 100644 --- a/drivers/gpu/drm/drm_gem_cma_helper.c +++ b/drivers/gpu/drm/drm_gem_cma_helper.c @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device *dev, { struct drm_gem_cma_object *cma_obj; - if (sgt->nents != 1) - return ERR_PTR(-EINVAL); + if (sgt->nents != 1) { + /* check if the entries in the sg_table are contiguous */ + dma_addr_t next_addr = sg_dma_address(sgt->sgl); + struct scatterlist *s; + unsigned int i; + + for_each_sg(sgt->sgl, s, sgt->nents, i) { + /* + * sg_dma_address(s) is only valid for entries + * that have sg_dma_len(s) != 0 + */ + if (!sg_dma_len(s)) + continue; + + if (sg_dma_address(s) != next_addr) + return ERR_PTR(-EINVAL); + + next_addr = sg_dma_address(s) + sg_dma_len(s); + } + } /* Create a CMA GEM buffer. */ cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size); diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h index 58a739bf15f1f..214aa85adc8d5 100644 --- a/include/drm/drm_gem_cma_helper.h +++ b/include/drm/drm_gem_cma_helper.h @@ -8,7 +8,9 @@ * struct drm_gem_cma_object - GEM object backed by CMA memory allocations * @base: base GEM object * @paddr: physical address of the backing memory - * @sgt: scatter/gather table for imported PRIME buffers + * @sgt: scatter/gather table for imported PRIME buffers. The table can have + * more than one entry but they are guaranteed to have contiguous + * DMA addresses. * @vaddr: kernel virtual address of the backing memory */ struct drm_gem_cma_object {