From patchwork Wed Dec 6 23:11:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott D Phillips X-Patchwork-Id: 10097391 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B82F160329 for ; Wed, 6 Dec 2017 23:12:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB38729ECE for ; Wed, 6 Dec 2017 23:12:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A01B929ED3; Wed, 6 Dec 2017 23:12:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6B3D629ECE for ; Wed, 6 Dec 2017 23:12:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 49B6F89E65; Wed, 6 Dec 2017 23:12:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D20789C89 for ; Wed, 6 Dec 2017 23:12:44 +0000 (UTC) Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Dec 2017 15:12:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,369,1508828400"; d="scan'208";a="697970" Received: from dsp-dsk1.jf.intel.com ([10.7.199.59]) by orsmga008.jf.intel.com with ESMTP; 06 Dec 2017 15:12:42 -0800 From: Scott D Phillips To: intel-gfx@lists.freedesktop.org Date: Wed, 6 Dec 2017 15:11:22 -0800 Message-Id: <20171206231123.22380-3-scott.d.phillips@intel.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171206231123.22380-1-scott.d.phillips@intel.com> References: <20171206231123.22380-1-scott.d.phillips@intel.com> Cc: Benjamin Widawsky Subject: [Intel-gfx] [PATCH i-g-t 3/4] lib/intel_aub: Add new MEM_TRACE commands X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The memtrace aub commands are similar to the existing ones, but different. Notably memtrace has commands for register write and poll. Signed-off-by: Scott D Phillips Tested-by: Jordan Justen --- lib/intel_aub.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/lib/intel_aub.h b/lib/intel_aub.h index 5f0aba8e..9ca548ed 100644 --- a/lib/intel_aub.h +++ b/lib/intel_aub.h @@ -49,6 +49,12 @@ #define CMD_AUB (7 << 29) #define CMD_AUB_HEADER (CMD_AUB | (1 << 23) | (0x05 << 16)) + +#define CMD_MEM_TRACE_REGISTER_POLL (CMD_AUB | (0x2e << 23) | (0x02 << 16)) +#define CMD_MEM_TRACE_REGISTER_WRITE (CMD_AUB | (0x2e << 23) | (0x03 << 16)) +#define CMD_MEM_TRACE_MEMORY_WRITE (CMD_AUB | (0x2e << 23) | (0x06 << 16)) +#define CMD_MEM_TRACE_VERSION (CMD_AUB | (0x2e << 23) | (0x0e << 16)) + /* DW1 */ # define AUB_HEADER_MAJOR_SHIFT 24 # define AUB_HEADER_MINOR_SHIFT 16 @@ -92,8 +98,28 @@ #define AUB_TRACE_MEMTYPE_PCI (3 << 16) #define AUB_TRACE_MEMTYPE_GTT_ENTRY (4 << 16) +#define AUB_MEM_TRACE_VERSION_FILE_VERSION 1 + /* DW2 */ +#define AUB_MEM_TRACE_VERSION_DEVICE_MASK 0x0000ff00 +#define AUB_MEM_TRACE_VERSION_DEVICE_CNL (15 << 8) + +#define AUB_MEM_TRACE_VERSION_METHOD_MASK 0x000c0000 +#define AUB_MEM_TRACE_VERSION_METHOD_PHY (1 << 18) + +#define AUB_MEM_TRACE_REGISTER_SIZE_MASK 0x000f0000 +#define AUB_MEM_TRACE_REGISTER_SIZE_DWORD (2 << 16) + +#define AUB_MEM_TRACE_REGISTER_SPACE_MASK 0xf0000000 +#define AUB_MEM_TRACE_REGISTER_SPACE_MMIO (0 << 28) + +/* DW3 */ + +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_MASK 0xf0000000 +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL (1 << 28) +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY (4 << 28) + /** * aub_state_struct_type enum values are encoded with the top 16 bits * representing the type to be delivered to the .aub file, and the bottom 16