From patchwork Wed Dec 13 22:13:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Micha=C5=82_Winiarski?= X-Patchwork-Id: 10110989 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7993C60327 for ; Wed, 13 Dec 2017 22:14:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6C788223A5 for ; Wed, 13 Dec 2017 22:14:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F8BB228C9; Wed, 13 Dec 2017 22:14:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BC27B223A5 for ; Wed, 13 Dec 2017 22:14:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4BE8A6E5EF; Wed, 13 Dec 2017 22:14:58 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id DC75D6E5EF for ; Wed, 13 Dec 2017 22:14:57 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Dec 2017 14:14:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,398,1508828400"; d="scan'208";a="15779326" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by orsmga001.jf.intel.com with ESMTP; 13 Dec 2017 14:14:55 -0800 Received: from localhost (172.28.172.64) by IRSMSX102.ger.corp.intel.com (163.33.3.155) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 13 Dec 2017 22:14:54 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Date: Wed, 13 Dec 2017 23:13:48 +0100 Message-ID: <20171213221352.7173-3-michal.winiarski@intel.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171213221352.7173-1-michal.winiarski@intel.com> References: <20171213221352.7173-1-michal.winiarski@intel.com> MIME-Version: 1.0 X-Originating-IP: [172.28.172.64] Subject: [Intel-gfx] [CI 3/7] drm/i915/guc: Extract guc_init from guc_init_hw X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP After GPU reset, GuC HW needs to be reinitialized (with FW reload). Unfortunately, we're doing some extra work there (mostly allocating stuff), work that can be moved to guc_init and called once at driver load time. As a side effect we're no longer hitting an assert in i915_ggtt_enable_guc on suspend/resume. v2: Do not duplicate disable_communication / reset_guc_interrupts v3: Add proper teardown after rebase References: 04f7b24eccdf ("drm/i915/guc: Assert that we switch between known ggtt->invalidate functions") Signed-off-by: Michał Winiarski Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Michal Wajdeczko Cc: Sagar Arun Kamble Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.c | 1 + drivers/gpu/drm/i915/i915_gem.c | 8 ++++- drivers/gpu/drm/i915/intel_uc.c | 71 ++++++++++++++++++++++++++--------------- drivers/gpu/drm/i915/intel_uc.h | 2 ++ 4 files changed, 56 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 285c8b238bff..ca9f4b2862eb 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -617,6 +617,7 @@ static void i915_gem_fini(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->drm.struct_mutex); intel_uc_fini_hw(dev_priv); + intel_uc_fini(dev_priv); i915_gem_cleanup_engines(dev_priv); i915_gem_contexts_fini(dev_priv); mutex_unlock(&dev_priv->drm.struct_mutex); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 2c13e3a4f45a..4a7f5579a7a5 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -5196,10 +5196,14 @@ int i915_gem_init(struct drm_i915_private *dev_priv) intel_init_gt_powersave(dev_priv); - ret = i915_gem_init_hw(dev_priv); + ret = intel_uc_init(dev_priv); if (ret) goto err_pm; + ret = i915_gem_init_hw(dev_priv); + if (ret) + goto err_uc_init; + /* * Despite its name intel_init_clock_gating applies both display * clock gating workarounds; GT mmio workarounds and the occasional @@ -5240,6 +5244,8 @@ int i915_gem_init(struct drm_i915_private *dev_priv) i915_gem_wait_for_idle(dev_priv, I915_WAIT_LOCKED); i915_gem_contexts_lost(dev_priv); intel_uc_fini_hw(dev_priv); +err_uc_init: + intel_uc_fini(dev_priv); err_pm: if (ret != -EIO) { intel_cleanup_gt_powersave(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 785850838a44..907deac6e3fa 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -214,26 +214,20 @@ void intel_uc_fini_wq(struct drm_i915_private *dev_priv) intel_guc_fini_wq(&dev_priv->guc); } -int intel_uc_init_hw(struct drm_i915_private *dev_priv) +int intel_uc_init(struct drm_i915_private *dev_priv) { struct intel_guc *guc = &dev_priv->guc; - struct intel_huc *huc = &dev_priv->huc; - int ret, attempts; + int ret; if (!USES_GUC(dev_priv)) return 0; - if (!HAS_GUC(dev_priv)) { - ret = -ENODEV; - goto err_out; - } - - guc_disable_communication(guc); - gen9_reset_guc_interrupts(dev_priv); + if (!HAS_GUC(dev_priv)) + return -ENODEV; ret = intel_guc_init(guc); if (ret) - goto err_out; + return ret; if (USES_GUC_SUBMISSION(dev_priv)) { /* @@ -241,10 +235,44 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) * if we are planning to enable submission later */ ret = intel_guc_submission_init(guc); - if (ret) - goto err_guc; + if (ret) { + intel_guc_fini(guc); + return ret; + } } + return 0; +} + +void intel_uc_fini(struct drm_i915_private *dev_priv) +{ + struct intel_guc *guc = &dev_priv->guc; + + if (!USES_GUC(dev_priv)) + return; + + GEM_BUG_ON(!HAS_GUC(dev_priv)); + + if (USES_GUC_SUBMISSION(dev_priv)) + intel_guc_submission_fini(guc); + + intel_guc_fini(guc); +} + +int intel_uc_init_hw(struct drm_i915_private *dev_priv) +{ + struct intel_guc *guc = &dev_priv->guc; + struct intel_huc *huc = &dev_priv->huc; + int ret, attempts; + + if (!USES_GUC(dev_priv)) + return 0; + + GEM_BUG_ON(!HAS_GUC(dev_priv)); + + guc_disable_communication(guc); + gen9_reset_guc_interrupts(dev_priv); + /* init WOPCM */ I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv)); I915_WRITE(DMA_GUC_WOPCM_OFFSET, @@ -264,12 +292,12 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) */ ret = __intel_uc_reset_hw(dev_priv); if (ret) - goto err_submission; + goto err_out; if (USES_HUC(dev_priv)) { ret = intel_huc_init_hw(huc); if (ret) - goto err_submission; + goto err_out; } intel_guc_init_params(guc); @@ -322,11 +350,6 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) guc_disable_communication(guc); err_log_capture: guc_capture_load_err_log(guc); -err_submission: - if (USES_GUC_SUBMISSION(dev_priv)) - intel_guc_submission_fini(guc); -err_guc: - intel_guc_fini(guc); err_out: /* * Note that there is no fallback as either user explicitly asked for @@ -348,15 +371,13 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv) if (!USES_GUC(dev_priv)) return; + GEM_BUG_ON(!HAS_GUC(dev_priv)); + if (USES_GUC_SUBMISSION(dev_priv)) intel_guc_submission_disable(guc); guc_disable_communication(guc); - if (USES_GUC_SUBMISSION(dev_priv)) { + if (USES_GUC_SUBMISSION(dev_priv)) gen9_disable_guc_interrupts(dev_priv); - intel_guc_submission_fini(guc); - } - - intel_guc_fini(guc); } diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index 53edfeaf56b0..8a7249722ef1 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -37,6 +37,8 @@ int intel_uc_init_wq(struct drm_i915_private *dev_priv); void intel_uc_fini_wq(struct drm_i915_private *dev_priv); int intel_uc_init_hw(struct drm_i915_private *dev_priv); void intel_uc_fini_hw(struct drm_i915_private *dev_priv); +int intel_uc_init(struct drm_i915_private *dev_priv); +void intel_uc_fini(struct drm_i915_private *dev_priv); static inline bool intel_uc_is_using_guc(void) {