From patchwork Wed Jan 3 20:39:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 10143377 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 42B45601A1 for ; Wed, 3 Jan 2018 20:41:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 39692291A7 for ; Wed, 3 Jan 2018 20:41:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2E4F02931F; Wed, 3 Jan 2018 20:41:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E1FAD291A7 for ; Wed, 3 Jan 2018 20:41:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E44B489262; Wed, 3 Jan 2018 20:41:30 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 113A0891A3 for ; Wed, 3 Jan 2018 20:41:28 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Jan 2018 12:41:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,503,1508828400"; d="scan'208";a="16568749" Received: from dk-thinkpad-x260.jf.intel.com (HELO localhost.localdomain) ([10.54.75.38]) by FMSMGA003.fm.intel.com with ESMTP; 03 Jan 2018 12:41:27 -0800 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Wed, 3 Jan 2018 12:39:59 -0800 Message-Id: <20180103204001.3008-3-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180103204001.3008-1-dhinakaran.pandiyan@intel.com> References: <20180103204001.3008-1-dhinakaran.pandiyan@intel.com> MIME-Version: 1.0 Cc: Daniel Vetter , Dhinakaran Pandiyan , Rodrigo Vivi Subject: [Intel-gfx] [PATCH 3/5] drm/i915: Enable vblanks after verifying power domain states. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Since we want to allow for a non-blocking power domain for vblanks, the power domain use count and power well use count will not be updated atomically inside the power domain mutex (see next patch). This affects verifying if sum(power_domain_use_count) == power_well_use_count at init time. So do not enable vblanks until this verification is done. Cc: Daniel Vetter Cc: Ville Syrjälä Cc: Rodrigo Vivi Cc: Maarten Lankhorst Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0cd355978ab4..7bc874b8dac7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14739,6 +14739,24 @@ static bool has_pch_trancoder(struct drm_i915_private *dev_priv, (HAS_PCH_LPT_H(dev_priv) && pch_transcoder == PIPE_A); } +static void modeset_enable_vblanks(struct drm_i915_private *dev_priv) +{ + enum pipe pipe; + + for_each_pipe(dev_priv, pipe) { + struct intel_crtc *crtc; + + crtc = intel_get_crtc_for_pipe(dev_priv, pipe); + + /* restore vblank interrupts to correct state */ + drm_crtc_vblank_reset(&crtc->base); + + if (crtc->active) + drm_crtc_vblank_on(&crtc->base); + } +} + + static void intel_sanitize_crtc(struct intel_crtc *crtc, struct drm_modeset_acquire_ctx *ctx) { @@ -14754,13 +14772,9 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); } - /* restore vblank interrupts to correct state */ - drm_crtc_vblank_reset(&crtc->base); if (crtc->active) { struct intel_plane *plane; - drm_crtc_vblank_on(&crtc->base); - /* Disable everything but the primary plane */ for_each_intel_plane_on_crtc(dev, crtc, plane) { const struct intel_plane_state *plane_state = @@ -15147,6 +15161,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev, intel_power_domains_verify_state(dev_priv); + modeset_enable_vblanks(dev_priv); + intel_fbc_init_pipe_state(dev_priv); }