From patchwork Mon Feb 12 06:08:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhinakaran Pandiyan X-Patchwork-Id: 10211853 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B7D99602CB for ; Mon, 12 Feb 2018 06:08:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A6DFB28807 for ; Mon, 12 Feb 2018 06:08:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9BEB428830; Mon, 12 Feb 2018 06:08:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6244228807 for ; Mon, 12 Feb 2018 06:08:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 803506E04C; Mon, 12 Feb 2018 06:08:16 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id B9AA789C68 for ; Mon, 12 Feb 2018 06:08:12 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Feb 2018 22:08:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,500,1511856000"; d="scan'208";a="203434499" Received: from dk-thinkpad-x260.jf.intel.com ([10.54.75.38]) by fmsmga006.fm.intel.com with ESMTP; 11 Feb 2018 22:08:11 -0800 From: Dhinakaran Pandiyan To: intel-gfx@lists.freedesktop.org Date: Sun, 11 Feb 2018 22:08:05 -0800 Message-Id: <20180212060805.3000-4-dhinakaran.pandiyan@intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180212060805.3000-1-dhinakaran.pandiyan@intel.com> References: <20180212060805.3000-1-dhinakaran.pandiyan@intel.com> Subject: [Intel-gfx] [PATCH 3/3] drm/i915/psr: Wait for PSR transition to complete before exiting. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hdegoede@redhat.com, Dhinakaran Pandiyan , luto@kernel.org, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP With fbdev, screen freezes after a few continuous PSR exit->enter cycles. Printing out the PSR status register clearly showed this freeze coincided with exiting when the hardware is in a transitory state. So wait for 100 ms (~6 frames) for PSR to become active and then exit. Cc: Rodrigo Vivi Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index ddfabdff3dea..7ef6bd01014d 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -738,6 +738,18 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv) WARN_ON(!(val & EDP_PSR2_ENABLE)); I915_WRITE(EDP_PSR2_CTL, val & ~EDP_PSR2_ENABLE); } else { + + /* Wait for about 6 frames in case we just enabled PSR, + * this prevents the screen from freezing as the HW does + * not seem to be able to back off cleanly it is already + * trying to enter PSR. + */ + intel_wait_for_register(dev_priv, + EDP_PSR_STATUS, + EDP_PSR_STATUS_STATE_MASK, + EDP_PSR_STATUS_STATE_SRDENT, + 100); + val = I915_READ(EDP_PSR_CTL); WARN_ON(!(val & EDP_PSR_ENABLE)); I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE);