| Message ID | 20180222035519.13486-18-paulo.r.zanoni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Feb 22, 2018 at 12:55:19AM -0300, Paulo Zanoni wrote: > From: Manasi Navare <manasi.d.navare@intel.com> > > On clock recovery this function is called to find out > the max voltage swing level that we could go. > > However gen 9 functions use the old buffer translation tables > to figure that out. ICL uses different set of tables for eDP > and DP for both Combo and MG PHY ports. This patch adds the hook > for ICL for getting this information from appropriate buf trans tables. > > v5 (from Paulo): > * New rebase after changes to earlier patches. > v4: > * Rebase. > v3: > * Follow the coding conventions here > (https://cgit.freedesktop.org/drm-intel/tree/Documentation/process/codin > g-style.rst#n191) (Paulo) > v2: > * Rebase after patch that adds voltage check inside buf trans > function (Rodrigo) > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> seems a lot change since my first review, but everything looks correct to me still on this newer version. So Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > --- > drivers/gpu/drm/i915/intel_ddi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index ad82ef91263e..fbdd2340c8aa 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2085,7 +2085,13 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder) > enum port port = encoder->port; > int n_entries; > > - if (IS_CANNONLAKE(dev_priv)) { > + if (IS_ICELAKE(dev_priv)) { > + if (port == PORT_A || port == PORT_B) > + icl_get_combo_buf_trans(dev_priv, port, encoder->type, > + &n_entries); > + else > + n_entries = ARRAY_SIZE(icl_mg_phy_ddi_translations); > + } else if (IS_CANNONLAKE(dev_priv)) { > if (encoder->type == INTEL_OUTPUT_EDP) > cnl_get_buf_trans_edp(dev_priv, &n_entries); > else > -- > 2.14.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index ad82ef91263e..fbdd2340c8aa 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2085,7 +2085,13 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder) enum port port = encoder->port; int n_entries; - if (IS_CANNONLAKE(dev_priv)) { + if (IS_ICELAKE(dev_priv)) { + if (port == PORT_A || port == PORT_B) + icl_get_combo_buf_trans(dev_priv, port, encoder->type, + &n_entries); + else + n_entries = ARRAY_SIZE(icl_mg_phy_ddi_translations); + } else if (IS_CANNONLAKE(dev_priv)) { if (encoder->type == INTEL_OUTPUT_EDP) cnl_get_buf_trans_edp(dev_priv, &n_entries); else