From patchwork Sat Feb 24 02:03:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10240155 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3B960602A0 for ; Sat, 24 Feb 2018 02:05:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C13D29AF0 for ; Sat, 24 Feb 2018 02:05:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 20DED29AF2; Sat, 24 Feb 2018 02:05:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B86BF29AF0 for ; Sat, 24 Feb 2018 02:05:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 334BF6F3AB; Sat, 24 Feb 2018 02:04:58 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id B0F8C6F39B for ; Sat, 24 Feb 2018 02:04:55 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Feb 2018 18:04:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,385,1515484800"; d="scan'208";a="19840939" Received: from josouza-mobl.jf.intel.com ([10.24.11.40]) by fmsmga007.fm.intel.com with ESMTP; 23 Feb 2018 18:04:55 -0800 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 23 Feb 2018 18:03:08 -0800 Message-Id: <20180224020311.14813-3-jose.souza@intel.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180224020311.14813-1-jose.souza@intel.com> References: <20180224020311.14813-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/6] drm/i915: Exit PSR before do a aux transaction in gen < 9 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dhinakaran.pandiyan@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP As gen < 9 hardware don't have the aux ch mutex, we need to exit PSR and wait until it is back to inactive state before do any aux ch transaction. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_dp.c | 8 +++++++- drivers/gpu/drm/i915/intel_drv.h | 9 +++++++++ drivers/gpu/drm/i915/intel_psr.c | 42 ++++++++++++++++++++++++++++++++++------ 3 files changed, 52 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 7be2fec51651..dacdd98bbb2e 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1088,8 +1088,14 @@ static bool intel_dp_aux_ch_trylock(struct intel_dp *intel_dp) to_i915(intel_dig_port->base.base.dev); i915_reg_t ch_mutex; - if (!intel_dp->aux_ch_mutex_reg) + if (!intel_dp->aux_ch_mutex_reg) { + /* As gen < 9 hardware don't have the aux ch mutex, we need to + * exit PSR and wait until it is back to inactive state before + * do any aux ch transaction + */ + intel_psr_exit(intel_dp, true); return true; + } ch_mutex = intel_dp->aux_ch_mutex_reg(intel_dp); I915_WRITE(ch_mutex, DP_AUX_CH_MUTEX_ENABLE); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 267cc6c5a89f..7adcd5955d1b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1881,6 +1881,15 @@ void intel_psr_single_frame_update(struct drm_i915_private *dev_priv, unsigned frontbuffer_bits); void intel_psr_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); +/** + * Exit PSR in the given DisplayPort. + * @intel_dp: DisplayPort which PSR should be exit if running + * @wait_exit: if true it will wait until PSR have changed to inactive state, + * otherwise there is not wait. + * + * It will also schedule a work to try to active PSR again. + */ +void intel_psr_exit(struct intel_dp *intel_dp, bool wait_exit); /* intel_runtime_pm.c */ int intel_power_domains_init(struct drm_i915_private *); diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index e8c32c3afb0e..0b889c85e8da 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -56,6 +56,8 @@ #include "intel_drv.h" #include "i915_drv.h" +#define PSR_ACTIVE_DELAY_MSEC 100 + static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe) { struct drm_i915_private *dev_priv = to_i915(dev); @@ -486,6 +488,16 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp, } } +static void intel_psr_active_schedule(struct i915_psr *psr, + unsigned int msec_delay) +{ + if (psr->active || psr->busy_frontbuffer_bits) + return; + + if (!work_busy(&psr->work.work)) + schedule_delayed_work(&psr->work, msecs_to_jiffies(msec_delay)); +} + /** * intel_psr_enable - Enable PSR * @intel_dp: Intel DP @@ -534,8 +546,9 @@ void intel_psr_enable(struct intel_dp *intel_dp, * - On HSW/BDW we get a recoverable frozen screen until * next exit-activate sequence. */ - schedule_delayed_work(&dev_priv->psr.work, - msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5)); + intel_psr_active_schedule(&dev_priv->psr, + intel_dp->panel_power_cycle_delay + * 5); } unlock: @@ -886,10 +899,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv, if (frontbuffer_bits) dev_priv->psr.exit(dev_priv->psr.enabled, false); - if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits) - if (!work_busy(&dev_priv->psr.work.work)) - schedule_delayed_work(&dev_priv->psr.work, - msecs_to_jiffies(100)); + intel_psr_active_schedule(&dev_priv->psr, PSR_ACTIVE_DELAY_MSEC); mutex_unlock(&dev_priv->psr.lock); } @@ -955,3 +965,23 @@ void intel_psr_init(struct drm_i915_private *dev_priv) dev_priv->psr.exit = hsw_psr_exit; } } + +void intel_psr_exit(struct intel_dp *intel_dp, bool wait_exit) +{ + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct drm_device *dev = intel_dig_port->base.base.dev; + struct drm_i915_private *dev_priv = to_i915(dev); + + if (!HAS_PSR(dev_priv)) + return; + + mutex_lock(&dev_priv->psr.lock); + + if (dev_priv->psr.enabled != intel_dp) + goto out; + + dev_priv->psr.exit(intel_dp, wait_exit); + intel_psr_active_schedule(&dev_priv->psr, PSR_ACTIVE_DELAY_MSEC); +out: + mutex_unlock(&dev_priv->psr.lock); +}