From patchwork Wed Mar 14 18:26:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniele Ceraolo Spurio X-Patchwork-Id: 10283325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 170BF602BD for ; Wed, 14 Mar 2018 18:27:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06EB2285A5 for ; Wed, 14 Mar 2018 18:27:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EFEB7285A8; Wed, 14 Mar 2018 18:27:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AFC93285A5 for ; Wed, 14 Mar 2018 18:27:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E26D56E74C; Wed, 14 Mar 2018 18:27:07 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 458666E73C for ; Wed, 14 Mar 2018 18:27:04 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Mar 2018 11:27:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,306,1517904000"; d="scan'208";a="208242436" Received: from relo-linux-1.fm.intel.com ([10.1.27.112]) by orsmga005.jf.intel.com with ESMTP; 14 Mar 2018 11:27:03 -0700 From: Daniele Ceraolo Spurio To: intel-gfx@lists.freedesktop.org Date: Wed, 14 Mar 2018 11:26:52 -0700 Message-Id: <20180314182653.26981-3-daniele.ceraolospurio@intel.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180314182653.26981-1-daniele.ceraolospurio@intel.com> References: <20180314182653.26981-1-daniele.ceraolospurio@intel.com> Subject: [Intel-gfx] [PATCH v4 3/4] drm/i915: use engine->irq_keep_mask when resetting irqs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP the "reset" value and the "keep" value are the same. While at it, add a TODO for gen11 interrupt reset Suggested-by: Chris Wilson Cc: Chris Wilson Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_lrc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 3a69b367e565..5e8f6896d059 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1666,6 +1666,10 @@ static void reset_irq(struct intel_engine_cs *engine) struct drm_i915_private *dev_priv = engine->i915; int i; + /* TODO: correctly reset irqs for gen11 */ + if (WARN_ON_ONCE(INTEL_GEN(engine->i915) >= 11)) + return; + GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir)); /* @@ -1677,11 +1681,11 @@ static void reset_irq(struct intel_engine_cs *engine) */ for (i = 0; i < 2; i++) { I915_WRITE(GEN8_GT_IIR(gtiir[engine->id]), - GT_CONTEXT_SWITCH_INTERRUPT << engine->irq_shift); + engine->irq_keep_mask); POSTING_READ(GEN8_GT_IIR(gtiir[engine->id])); } GEM_BUG_ON(I915_READ(GEN8_GT_IIR(gtiir[engine->id])) & - (GT_CONTEXT_SWITCH_INTERRUPT << engine->irq_shift)); + engine->irq_keep_mask); clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted); }