diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 96b298643062..5f02412e9aff 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1248,23 +1248,26 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
 	if (IS_GEN5(dev_priv))
 		intel_gpu_ips_init(dev_priv);
 
-	intel_audio_init(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_audio_init(dev_priv);
 
-	/*
-	 * Some ports require correctly set-up hpd registers for detection to
-	 * work properly (leading to ghost connected connector status), e.g. VGA
-	 * on gm45.  Hence we can only set up the initial fbdev config after hpd
-	 * irqs are fully enabled. We do it last so that the async config
-	 * cannot run before the connectors are registered.
-	 */
-	intel_fbdev_initial_config_async(dev);
+		/*
+		 * Some ports require correctly set-up hpd registers for
+		 * detection to work properly (leading to ghost connected
+		 * connector status), e.g. VGA on gm45.  Hence we can only set
+		 * up the initial fbdev config after hpd irqs are fully enabled.
+		 * We do it last so that the async config cannot run before the
+		 * connectors are registered.
+		 */
+		intel_fbdev_initial_config_async(dev);
 
-	/*
-	 * We need to coordinate the hotplugs with the asynchronous fbdev
-	 * configuration, for which we use the fbdev->async_cookie.
-	 */
-	if (INTEL_INFO(dev_priv)->num_pipes)
+		/*
+		 * We need to coordinate the hotplugs with the asynchronous
+		 * fbdev configuration, for which we use the
+		 * fbdev->async_cookie.
+		 */
 		drm_kms_helper_poll_init(dev);
+	}
 }
 
 /**
@@ -1273,15 +1276,17 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
  */
 static void i915_driver_unregister(struct drm_i915_private *dev_priv)
 {
-	intel_fbdev_unregister(dev_priv);
-	intel_audio_deinit(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_fbdev_unregister(dev_priv);
+		intel_audio_deinit(dev_priv);
 
-	/*
-	 * After flushing the fbdev (incl. a late async config which will
-	 * have delayed queuing of a hotplug event), then flush the hotplug
-	 * events.
-	 */
-	drm_kms_helper_poll_fini(&dev_priv->drm);
+		/*
+		 * After flushing the fbdev (incl. a late async config which
+		 * will have delayed queuing of a hotplug event), then flush the
+		 * hotplug events.
+		 */
+		drm_kms_helper_poll_fini(&dev_priv->drm);
+	}
 
 	intel_gpu_ips_teardown();
 	acpi_video_unregister();
@@ -1333,6 +1338,9 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
 		driver.driver_features &= ~DRIVER_ATOMIC;
 
+	if (i915_modparams.disable_display)
+		driver.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
+
 	ret = -ENOMEM;
 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 	if (dev_priv)
@@ -1390,9 +1398,11 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret)
 		goto cleanup_irq;
 
-	ret = i915_load_modeset_init(&dev_priv->drm);
-	if (ret < 0)
-		goto cleanup_gem;
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		ret = i915_load_modeset_init(&dev_priv->drm);
+		if (ret < 0)
+			goto cleanup_gem;
+	}
 
 	i915_driver_register(dev_priv);
 
@@ -1455,11 +1465,13 @@ void i915_driver_unload(struct drm_device *dev)
 
 	intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 
-	drm_atomic_helper_shutdown(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		drm_atomic_helper_shutdown(dev);
 
 	intel_gvt_cleanup(dev_priv);
 
-	intel_modeset_cleanup_prepare(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_modeset_cleanup_prepare(dev);
 
 	intel_disable_gt_powersave(dev_priv);
 
@@ -1470,11 +1482,13 @@ void i915_driver_unload(struct drm_device *dev)
 	 */
 	intel_irq_uninstall(dev_priv);
 
-	intel_modeset_cleanup(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_modeset_cleanup(dev);
 
 	intel_cleanup_gt_powersave(dev_priv);
 
-	i915_modeset_unload(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		i915_modeset_unload(dev);
 
 	/* Free error state after interrupts are fully disabled. */
 	cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
@@ -1526,8 +1540,12 @@ static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
  */
 static void i915_driver_lastclose(struct drm_device *dev)
 {
-	intel_fbdev_restore_mode(dev);
-	vga_switcheroo_process_delayed_switch();
+	struct drm_i915_private *dev_priv = to_i915(dev);
+
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_fbdev_restore_mode(dev);
+		vga_switcheroo_process_delayed_switch();
+	}
 }
 
 static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
@@ -1597,19 +1615,24 @@ static int i915_drm_suspend(struct drm_device *dev)
 	/* We do a lot of poking in a lot of registers, make sure they work
 	 * properly. */
 	intel_display_set_init_power(dev_priv, true);
-
-	drm_kms_helper_poll_disable(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		drm_kms_helper_poll_disable(dev);
 
 	pci_save_state(pdev);
 
-	intel_display_suspend(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_display_suspend(dev);
 
-	intel_dp_mst_suspend(dev_priv);
+		intel_dp_mst_suspend(dev_priv);
+	}
 
 	intel_runtime_pm_disable_interrupts(dev_priv);
-	intel_hpd_cancel_work(dev_priv);
 
-	intel_suspend_encoders(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_hpd_cancel_work(dev_priv);
+
+		intel_suspend_encoders(dev_priv);
+	}
 
 	intel_suspend_hw(dev_priv);
 
@@ -1622,11 +1645,13 @@ static int i915_drm_suspend(struct drm_device *dev)
 
 	intel_opregion_unregister(dev_priv);
 
-	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);
 
 	dev_priv->suspend_count++;
 
-	intel_csr_ucode_suspend(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_csr_ucode_suspend(dev_priv);
 
 	enable_rpm_wakeref_asserts(dev_priv);
 
@@ -1737,10 +1762,12 @@ static int i915_drm_resume(struct drm_device *dev)
 	if (ret)
 		DRM_ERROR("failed to re-enable GGTT\n");
 
-	intel_csr_ucode_resume(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_csr_ucode_resume(dev_priv);
 
 	i915_restore_state(dev_priv);
-	intel_pps_unlock_regs_wa(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_pps_unlock_regs_wa(dev_priv);
 	intel_opregion_setup(dev_priv);
 
 	intel_init_pch_refclk(dev_priv);
@@ -1757,7 +1784,8 @@ static int i915_drm_resume(struct drm_device *dev)
 	 */
 	intel_runtime_pm_enable_interrupts(dev_priv);
 
-	drm_mode_config_reset(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		drm_mode_config_reset(dev);
 
 	i915_gem_resume(dev_priv);
 
@@ -1769,23 +1797,26 @@ static int i915_drm_resume(struct drm_device *dev)
 		dev_priv->display.hpd_irq_setup(dev_priv);
 	spin_unlock_irq(&dev_priv->irq_lock);
 
-	intel_dp_mst_resume(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_dp_mst_resume(dev_priv);
 
-	intel_display_resume(dev);
+		intel_display_resume(dev);
 
-	drm_kms_helper_poll_enable(dev);
+		drm_kms_helper_poll_enable(dev);
 
-	/*
-	 * ... but also need to make sure that hotplug processing
-	 * doesn't cause havoc. Like in the driver load code we don't
-	 * bother with the tiny race here where we might loose hotplug
-	 * notifications.
-	 * */
-	intel_hpd_init(dev_priv);
+		/*
+		 * ... but also need to make sure that hotplug processing
+		 * doesn't cause havoc. Like in the driver load code we don't
+		 * bother with the tiny race here where we might loose hotplug
+		 * notifications.
+		 */
+		intel_hpd_init(dev_priv);
+	}
 
 	intel_opregion_register(dev_priv);
 
-	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false);
 
 	intel_opregion_notify_adapter(dev_priv, PCI_D0);
 
@@ -2689,7 +2720,8 @@ static int intel_runtime_suspend(struct device *kdev)
 
 	assert_forcewakes_inactive(dev_priv);
 
-	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
+	if (INTEL_INFO(dev_priv)->num_pipes && (!IS_VALLEYVIEW(dev_priv) &&
+						!IS_CHERRYVIEW(dev_priv)))
 		intel_hpd_poll_init(dev_priv);
 
 	DRM_DEBUG_KMS("Device suspended\n");
@@ -2746,10 +2778,12 @@ static int intel_runtime_resume(struct device *kdev)
 	 * power well, so hpd is reinitialized from there. For
 	 * everyone else do it here.
 	 */
-	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
+	if (INTEL_INFO(dev_priv)->num_pipes && (!IS_VALLEYVIEW(dev_priv) &&
+						!IS_CHERRYVIEW(dev_priv)))
 		intel_hpd_init(dev_priv);
 
-	intel_enable_ipc(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_enable_ipc(dev_priv);
 
 	enable_rpm_wakeref_asserts(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 8f3aa4dc0c98..f697865236a6 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -63,11 +63,13 @@ int i915_save_state(struct drm_i915_private *dev_priv)
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
 
-	i915_save_display(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		i915_save_display(dev_priv);
 
-	if (IS_GEN4(dev_priv))
-		pci_read_config_word(pdev, GCDGMBUS,
-				     &dev_priv->regfile.saveGCDGMBUS);
+		if (IS_GEN4(dev_priv))
+			pci_read_config_word(pdev, GCDGMBUS,
+					     &dev_priv->regfile.saveGCDGMBUS);
+	}
 
 	/* Cache mode state */
 	if (INTEL_GEN(dev_priv) < 7)
@@ -108,10 +110,13 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
 
-	if (IS_GEN4(dev_priv))
-		pci_write_config_word(pdev, GCDGMBUS,
-				      dev_priv->regfile.saveGCDGMBUS);
-	i915_restore_display(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		if (IS_GEN4(dev_priv))
+			pci_write_config_word(pdev, GCDGMBUS,
+					      dev_priv->regfile.saveGCDGMBUS);
+
+		i915_restore_display(dev_priv);
+	}
 
 	/* Cache mode state */
 	if (INTEL_GEN(dev_priv) < 7)
@@ -143,7 +148,8 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
 
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
-	intel_i2c_reset(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_i2c_reset(dev_priv);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index fb12df402d21..a43acd979f47 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1038,7 +1038,8 @@ static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
 	intel_power_sequencer_reset(dev_priv);
 
 	/* Prevent us from re-enabling polling on accident in late suspend */
-	if (!dev_priv->drm.dev->power.is_suspended)
+	if (INTEL_INFO(dev_priv)->num_pipes &&
+	    !dev_priv->drm.dev->power.is_suspended)
 		intel_hpd_poll_init(dev_priv);
 }
 
