diff mbox series

[07/10] drm/i915/icl: Make own function for display irq handler

Message ID 20180920143350.29249-8-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series ICL interrupt handling improvements | expand

Commit Message

Mika Kuoppala Sept. 20, 2018, 2:33 p.m. UTC 
Move display interrupt handling outside of generic handler.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 36 ++++++++++++++++++++-------------
 1 file changed, 22 insertions(+), 14 deletions(-)

Comments

Chris Wilson Sept. 20, 2018, 3:02 p.m. UTC | #1 
Quoting Mika Kuoppala (2018-09-20 15:33:47)
> Move display interrupt handling outside of generic handler.

Nah, this needs to be split into the ack/handle as per Ville's
suggestion.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e9034d6d87b0..506cfd048dd6 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3118,6 +3118,27 @@  gen11_gu_misc_irq_handler(struct drm_i915_private *dev_priv,
 	DRM_ERROR("Unexpected GU_MISC interrupt 0x%x\n", iir);
 }
 
+static void
+gen11_display_irq_handler(struct drm_i915_private * const i915,
+			  const u32 master_ctl)
+{
+	u32 disp_ctl;
+
+	if (!(master_ctl & GEN11_DISPLAY_IRQ))
+		return;
+
+	/* IRQs are synced during runtime_suspend, we don't require a wakeref */
+	disp_ctl = raw_reg_read(i915->regs, GEN11_DISPLAY_INT_CTL);
+
+	disable_rpm_wakeref_asserts(i915);
+	/*
+	 * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
+	 * for the display related bits.
+	 */
+	gen8_de_irq_handler(i915, disp_ctl);
+	enable_rpm_wakeref_asserts(i915);
+}
+
 static inline void gen11_master_irq_enable(void __iomem * const regs)
 {
 	raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
@@ -3144,20 +3165,7 @@  static irqreturn_t gen11_irq_handler(int irq, void *arg)
 
 	/* Find, clear, then process each source of interrupt. */
 	gen11_gt_irq_handler(i915, master_ctl);
-
-	/* IRQs are synced during runtime_suspend, we don't require a wakeref */
-	if (master_ctl & GEN11_DISPLAY_IRQ) {
-		const u32 disp_ctl = raw_reg_read(regs, GEN11_DISPLAY_INT_CTL);
-
-		disable_rpm_wakeref_asserts(i915);
-		/*
-		 * GEN11_DISPLAY_INT_CTL has same format as GEN8_MASTER_IRQ
-		 * for the display related bits.
-		 */
-		gen8_de_irq_handler(i915, disp_ctl);
-		enable_rpm_wakeref_asserts(i915);
-	}
-
+	gen11_display_irq_handler(i915, master_ctl);
 	gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl);
 
 	gen11_master_irq_enable(regs);