| Message ID | 20180920143350.29249-9-mika.kuoppala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ICL interrupt handling improvements | expand |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 506cfd048dd6..b4992d397c5d 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3163,13 +3163,12 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) master_ctl = gen11_master_irq_disable(regs); - /* Find, clear, then process each source of interrupt. */ - gen11_gt_irq_handler(i915, master_ctl); gen11_display_irq_handler(i915, master_ctl); gu_misc_iir = gen11_gu_misc_irq_ack(regs, master_ctl); gen11_master_irq_enable(regs); + gen11_gt_irq_handler(i915, master_ctl); gen11_gu_misc_irq_handler(i915, gu_misc_iir); return master_ctl ? IRQ_HANDLED : IRQ_NONE;
Don't keep master disabled while we handle the current interrupts. This should help a little on latency of generating the next interrupt. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/i915_irq.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)