Message ID | 20180927205735.16651-1-dhinakaran.pandiyan@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [CI,1/6] drm/i915/dp: Fix link retraining comment in intel_dp_long_pulse() | expand |
On Thursday, September 27, 2018 1:57:30 PM PDT Dhinakaran Pandiyan wrote: > Comment claims link needs to be retrained because the connected sink raised > a long pulse to indicate link loss. If the sink did so, > intel_dp_hotplug() would have handled link retraining. Looking at the > logs in Bugzilla referenced in commit '3cf71bc9904d ("drm/i915: Re-apply > Perform link quality check, unconditionally during long pulse"")', the > issue is that the sink does not trigger an interrupt. What we want is > ->detect() from user space to check link status and retrain. Ville's > review for the original patch also indicates the same root cause. So, > rewrite the comment. > > v2: Patch split and rewrote comment. I have pushed this series, thanks for the reviews. -DK
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 256a71c8c093..207b3ea2ed1a 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -5074,16 +5074,9 @@ intel_dp_long_pulse(struct intel_connector *connector, goto out; } else { /* - * If display is now connected check links status, - * there has been known issues of link loss triggering - * long pulse. - * - * Some sinks (eg. ASUS PB287Q) seem to perform some - * weird HPD ping pong during modesets. So we can apparently - * end up with HPD going low during a modeset, and then - * going back up soon after. And once that happens we must - * retrain the link to get a picture. That's in case no - * userspace component reacted to intermittent HPD dip. + * Some external monitors do not signal loss of link + * synchronization with an IRQ_HPD, so force a link status + * check. */ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;