From patchwork Fri Sep 28 22:06:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anuj Phogat X-Patchwork-Id: 10620375 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3BEE115E8 for ; Fri, 28 Sep 2018 22:07:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C82C2BDB3 for ; Fri, 28 Sep 2018 22:07:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1FB5C2C14A; Fri, 28 Sep 2018 22:07:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D6F412BDB3 for ; Fri, 28 Sep 2018 22:07:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DDF86E1BF; Fri, 28 Sep 2018 22:07:11 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id BF3276E1BF for ; Fri, 28 Sep 2018 22:07:09 +0000 (UTC) Received: by mail-pf1-x443.google.com with SMTP id p12-v6so5195388pfh.2 for ; Fri, 28 Sep 2018 15:07:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=dwQlxl2qmo1FZbjACBrcxvn6UtO9q9XFYSUEUuU+U7M=; b=RmY1e8ad2nU+TMbib60Mg3qeJMxjAZ4Ms+Wp+skicb0YvJL3ZTSb6+Tm7+CE+fOzOo 24J3BmADzQP3y19yPSxPeDu0r6yI4yiNKF3MmJWPFCKtqTY4HUHeDf1siHgMR5vDXGdL K8Df4dG3i4SNYcLkXqITCLWjsnzLGlbWrbUDrQs7bCB+1uZj6IEUkFaL23A//dvYtFrU rskV5e9OkGq1sTEGr+FLOSwZPr0v7DOgjT/M7bcTHqOQRTR3D8hZGBhc7KoXtzZHmHmp c6MJGiWC9KH8GGkSYloC2QFmGon0HE5vvZWHvtyEtynYK9SnJrdVNsjokf1MkvU1ZddP SkyQ== X-Gm-Message-State: ABuFfogS/P6FyEElCl7cxFDRva6Ni7yGH8s5DQl8RwT4u8vPj9ifhwle 7tjEa1FO4T9+x2+oYiJQdV2Mubv5 X-Google-Smtp-Source: ACcGV60dr6q2tn5FDozOypgo4KoskWGl3RKWckG7hwI4z/tGHN60P1+mbTllQkYZAWdkwXY7uqeb5w== X-Received: by 2002:a62:4803:: with SMTP id v3-v6mr514746pfa.89.1538172429015; Fri, 28 Sep 2018 15:07:09 -0700 (PDT) Received: from ticktock.ak.intel.com ([134.134.139.83]) by smtp.googlemail.com with ESMTPSA id s27-v6sm12501912pfk.133.2018.09.28.15.07.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 28 Sep 2018 15:07:08 -0700 (PDT) From: Anuj Phogat To: intel-gfx@lists.freedesktop.org Date: Fri, 28 Sep 2018 15:06:48 -0700 Message-Id: <20180928220648.24899-1-anuj.phogat@gmail.com> X-Mailer: git-send-email 2.17.1 Subject: [Intel-gfx] [PATCH] Add Wa_1606682166 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes. Disable the Sampler state prefetch functionality in the SARB by programming 0xB000[30] to '1'. This is to be done at boot time and the feature must remain disabled permanently. Fixes flaky tex-mip-level-selection* piglit tests with Mesa i965 driver. Cc: Radhakrishna Sripada Signed-off-by: Anuj Phogat --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_workarounds.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index dd422c4..528b449 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7475,6 +7475,7 @@ enum { #define GEN7_SARCHKMD _MMIO(0xB000) #define GEN7_DISABLE_DEMAND_PREFETCH (1 << 31) +#define GEN7_DISABLE_SAMPLER_PREFETCH (1 << 30) #define GEN7_L3SQCREG1 _MMIO(0xB010) #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000 diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 620111b..5589611 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -939,7 +939,8 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_C0)) I915_WRITE(GEN7_SARCHKMD, I915_READ(GEN7_SARCHKMD) | - GEN7_DISABLE_DEMAND_PREFETCH); + GEN7_DISABLE_DEMAND_PREFETCH | + GEN7_DISABLE_SAMPLER_PREFETCH); } static void tgl_gt_workarounds_apply(struct drm_i915_private *dev_priv)