From patchwork Thu Oct 18 10:41:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10646983 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 90A4313B0 for ; Thu, 18 Oct 2018 10:41:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DCB92872A for ; Thu, 18 Oct 2018 10:41:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6D2CE2846C; Thu, 18 Oct 2018 10:41:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 13F012846C for ; Thu, 18 Oct 2018 10:41:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D50F56E49C; Thu, 18 Oct 2018 10:41:16 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8D25C6E49C for ; Thu, 18 Oct 2018 10:41:15 +0000 (UTC) Received: by mail-wm1-x342.google.com with SMTP id y11-v6so4935706wma.3 for ; Thu, 18 Oct 2018 03:41:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=mUXlKQl7KCfKsoCZio6q9AC/cxLvwHSfcojKGDu0pcY=; b=CKYM2gq30pHSs3u4L6U7AHjL0KpeHtBh83unJqMB9jZwfGw19xnxhY/VQEVaO2NgtN xAseQyzLiRb/OeKi65eDUBo2hcg3/cK8xcxaB8upiGryolJbcPAkiLjb/Bk8uP8xo+0F jZgoCIcVNJFqN51xO7AQkfvmYTWBSNlB9z0gaC8p8SfIRiOEKIrhchnEwZW3yYP2Ocu+ dD9iT4ASpzAhcSxgo0JhA4qCrVllwL6tDGeA8JCZIBA1YRzOjSpTNZf2L4zoHGZBq1bo FXaudQkA+ydw5NmV9b9t1hUiyaki7MSbKMMckTrz5zhKsVJpuO8HSeG5lrPwsbvuQ6+N fhmw== X-Gm-Message-State: ABuFfogzyi4omM6UDlnDB0kYHHRlNZDcdB+tDo6w/bX4DCnFqNcsMhl+ 9JbJT7vu/1M9F0UsA0+MEqa0o9R1Mqw= X-Google-Smtp-Source: ACcGV60TOlgoFW8deAHBIuem5UOAk20Ye6J1JEzpsWTW4te1JNjUd1oxNeU0ooAKgxrCr4xOnMm8Ig== X-Received: by 2002:a1c:3795:: with SMTP id e143-v6mr7113955wma.9.1539859273835; Thu, 18 Oct 2018 03:41:13 -0700 (PDT) Received: from localhost.localdomain ([91.110.193.16]) by smtp.gmail.com with ESMTPSA id e5-v6sm10245966wru.88.2018.10.18.03.41.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Oct 2018 03:41:13 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Thu, 18 Oct 2018 11:41:06 +0100 Message-Id: <20181018104106.30147-1-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.17.1 Subject: [Intel-gfx] [PATCH] drm/i915/icl: Store available engine masks in INTEL_INFO X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Upcoming GuC code will need to read the fused off engine masks as well, and will also want to have them as enabled instead of disabled masks. To consolidate the read-out place we can store them in this fashion inside INTEL_INFO so they can be easily referenced in the future. Signed-off-by: Tvrtko Ursulin Cc: Daniele Ceraolo Spurio Reviewed-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/intel_device_info.c | 33 +++++++++++------------- drivers/gpu/drm/i915/intel_device_info.h | 4 +++ 2 files changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 03df4e33763d..4ed86025e3c9 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -876,40 +876,37 @@ void intel_driver_caps_print(const struct intel_driver_caps *caps, void intel_device_info_init_mmio(struct drm_i915_private *dev_priv) { struct intel_device_info *info = mkwrite_device_info(dev_priv); - u8 vdbox_disable, vebox_disable; u32 media_fuse; - int i; + unsigned int i; if (INTEL_GEN(dev_priv) < 11) return; - media_fuse = I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE); + media_fuse = ~I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE); - vdbox_disable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK; - vebox_disable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >> - GEN11_GT_VEBOX_DISABLE_SHIFT; + info->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK; + info->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >> + GEN11_GT_VEBOX_DISABLE_SHIFT; - DRM_DEBUG_DRIVER("vdbox disable: %04x\n", vdbox_disable); + DRM_DEBUG_DRIVER("vdbox enable: %04x\n", info->vdbox_enable); for (i = 0; i < I915_MAX_VCS; i++) { if (!HAS_ENGINE(dev_priv, _VCS(i))) continue; - if (!(BIT(i) & vdbox_disable)) - continue; - - info->ring_mask &= ~ENGINE_MASK(_VCS(i)); - DRM_DEBUG_DRIVER("vcs%u fused off\n", i); + if (!(BIT(i) & info->vdbox_enable)) { + info->ring_mask &= ~ENGINE_MASK(_VCS(i)); + DRM_DEBUG_DRIVER("vcs%u fused off\n", i); + } } - DRM_DEBUG_DRIVER("vebox disable: %04x\n", vebox_disable); + DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable); for (i = 0; i < I915_MAX_VECS; i++) { if (!HAS_ENGINE(dev_priv, _VECS(i))) continue; - if (!(BIT(i) & vebox_disable)) - continue; - - info->ring_mask &= ~ENGINE_MASK(_VECS(i)); - DRM_DEBUG_DRIVER("vecs%u fused off\n", i); + if (!(BIT(i) & info->vebox_enable)) { + info->ring_mask &= ~ENGINE_MASK(_VECS(i)); + DRM_DEBUG_DRIVER("vecs%u fused off\n", i); + } } } diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index af7002640cdf..b4c2c4eae78b 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -185,6 +185,10 @@ struct intel_device_info { u32 cs_timestamp_frequency_khz; + /* Enabled (not fused off) media engine bitmasks. */ + u8 vdbox_enable; + u8 vebox_enable; + struct color_luts { u16 degamma_lut_size; u16 gamma_lut_size;