From patchwork Tue Feb 26 14:29:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lionel Landwerlin X-Patchwork-Id: 10830373 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E44DF1669 for ; Tue, 26 Feb 2019 14:29:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D24402C525 for ; Tue, 26 Feb 2019 14:29:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C652D2C530; Tue, 26 Feb 2019 14:29:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 479CA2C525 for ; Tue, 26 Feb 2019 14:29:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6D73E89EB8; Tue, 26 Feb 2019 14:29:29 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2613489E69 for ; Tue, 26 Feb 2019 14:29:25 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2019 06:29:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,415,1544515200"; d="scan'208";a="150113376" Received: from delly.ld.intel.com ([10.103.238.201]) by fmsmga001.fm.intel.com with ESMTP; 26 Feb 2019 06:29:24 -0800 From: Lionel Landwerlin To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Feb 2019 14:29:07 +0000 Message-Id: <20190226142911.9789-6-lionel.g.landwerlin@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190226142911.9789-1-lionel.g.landwerlin@intel.com> References: <20190226142911.9789-1-lionel.g.landwerlin@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 5/9] drm/i915/perf: add new open param to configure polling of OA buffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This new parameter let's the application choose how often the OA buffer should be checked on the CPU side for data availability. Longer polling period tend to reduce CPU overhead if the application does not care about somewhat real time data collection. v2: Allow disabling polling completely with 0 value (Lionel) v3: Version the new parameter (Joonas) Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_drv.h | 6 +++++ drivers/gpu/drm/i915/i915_perf.c | 43 ++++++++++++++++++++++++++------ include/uapi/drm/i915_drm.h | 10 ++++++++ 3 files changed, 52 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index feb0a377f353..b54929cbf1f9 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1394,6 +1394,12 @@ struct i915_perf_stream { * @oa_config: The OA configuration used by the stream. */ struct i915_oa_config *oa_config; + + /** + * @poll_oa_period: The period in nanoseconds at which the OA + * buffer should be checked for available data. + */ + u64 poll_oa_period; }; /** diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 4504d4e18633..5ef9164a22a0 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -254,11 +254,11 @@ */ #define OA_TAIL_MARGIN_NSEC 100000ULL -/* frequency for checking whether the OA unit has written new reports to the - * circular OA buffer... +/* The default frequency for checking whether the OA unit has written new + * reports to the circular OA buffer... */ -#define POLL_FREQUENCY 200 -#define POLL_PERIOD (NSEC_PER_SEC / POLL_FREQUENCY) +#define DEFAULT_POLL_FREQUENCY 200 +#define DEFAULT_POLL_PERIOD (NSEC_PER_SEC / DEFAULT_POLL_FREQUENCY) /* for sysctl proc_dointvec_minmax of dev.i915.perf_stream_paranoid */ static int zero; @@ -335,6 +335,8 @@ static const struct i915_oa_format gen8_plus_oa_formats[I915_OA_FORMAT_MAX] = { * @oa_format: An OA unit HW report format * @oa_periodic: Whether to enable periodic OA unit sampling * @oa_period_exponent: The OA unit sampling period is derived from this + * @poll_oa_period: The period at which the CPU will check for OA data + * availability * * As read_properties_unlocked() enumerates and validates the properties given * to open a stream of metrics the configuration is built up in the structure @@ -351,6 +353,7 @@ struct perf_open_properties { int oa_format; bool oa_periodic; int oa_period_exponent; + u64 poll_oa_period; }; static void free_oa_config(struct drm_i915_private *dev_priv, @@ -1892,9 +1895,9 @@ static void i915_oa_stream_enable(struct i915_perf_stream *stream) dev_priv->perf.oa.ops.oa_enable(stream); - if (dev_priv->perf.oa.periodic) + if (dev_priv->perf.oa.periodic && stream->poll_oa_period) hrtimer_start(&dev_priv->perf.oa.poll_check_timer, - ns_to_ktime(POLL_PERIOD), + ns_to_ktime(stream->poll_oa_period), HRTIMER_MODE_REL_PINNED); } @@ -2258,13 +2261,15 @@ static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer) struct drm_i915_private *dev_priv = container_of(hrtimer, typeof(*dev_priv), perf.oa.poll_check_timer); + struct i915_perf_stream *stream = dev_priv->perf.oa.exclusive_stream; if (oa_buffer_check_unlocked(dev_priv)) { dev_priv->perf.oa.pollin = true; wake_up(&dev_priv->perf.oa.poll_wq); } - hrtimer_forward_now(hrtimer, ns_to_ktime(POLL_PERIOD)); + hrtimer_forward_now(hrtimer, + ns_to_ktime(stream->poll_oa_period)); return HRTIMER_RESTART; } @@ -2585,6 +2590,7 @@ i915_perf_open_ioctl_locked(struct drm_i915_private *dev_priv, stream->dev_priv = dev_priv; stream->ctx = specific_ctx; + stream->poll_oa_period = props->poll_oa_period; ret = i915_oa_stream_init(stream, param, props); if (ret) @@ -2640,6 +2646,7 @@ static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent) /** * read_properties_unlocked - validate + copy userspace stream open properties * @dev_priv: i915 device instance + * @open_flags: Flags set by userspace for the opening of the stream * @uprops: The array of u64 key value pairs given by userspace * @n_props: The number of key value pairs expected in @uprops * @props: The stream configuration built up while validating properties @@ -2653,6 +2660,7 @@ static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent) * rule out defining new properties with ordering requirements in the future. */ static int read_properties_unlocked(struct drm_i915_private *dev_priv, + u32 open_flags, u64 __user *uprops, u32 n_props, struct perf_open_properties *props) @@ -2661,6 +2669,7 @@ static int read_properties_unlocked(struct drm_i915_private *dev_priv, u32 i; memset(props, 0, sizeof(struct perf_open_properties)); + props->poll_oa_period = DEFAULT_POLL_PERIOD; if (!n_props) { DRM_DEBUG("No i915 perf properties given\n"); @@ -2764,6 +2773,14 @@ static int read_properties_unlocked(struct drm_i915_private *dev_priv, props->oa_periodic = true; props->oa_period_exponent = value; break; + case DRM_I915_PERF_PROP_POLL_OA_DELAY: + if (value > 0 && value < 100000 /* 100us */) { + DRM_DEBUG("OA availability timer too small (%lluns < 100us)\n", + value); + return -EINVAL; + } + props->poll_oa_period = value; + break; case DRM_I915_PERF_PROP_MAX: MISSING_CASE(id); return -EINVAL; @@ -2772,6 +2789,17 @@ static int read_properties_unlocked(struct drm_i915_private *dev_priv, uprop += 2; } + /* + * Blocking read need to be waken up by some mechanism. If no polling + * of the HEAD/TAIL register is done by the kernel, we'll never be + * able to wake up. + */ + if ((open_flags & I915_PERF_FLAG_FD_NONBLOCK) == 0 && + !props->poll_oa_period) { + DRM_DEBUG("Requesting a blocking stream with no polling period.\n"); + return -EINVAL; + } + return 0; } @@ -2822,6 +2850,7 @@ int i915_perf_open_ioctl(struct drm_device *dev, void *data, } ret = read_properties_unlocked(dev_priv, + param->flags, u64_to_user_ptr(param->properties_ptr), param->num_properties, &props); diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index d92d6e8f2cc7..a04de844d95e 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1647,6 +1647,16 @@ enum drm_i915_perf_property_id { */ DRM_I915_PERF_PROP_OA_EXPONENT, + /** + * Specifying this property sets up a hrtimer in nanoseconds at which + * the i915 driver will check the OA buffer for available data. A + * value of 0 means no hrtimer will be started. Values below 100 + * microseconds are not allowed. + * + * This property is available in perf revision 2. + */ + DRM_I915_PERF_PROP_POLL_OA_DELAY, + DRM_I915_PERF_PROP_MAX /* non-ABI */ };