diff mbox series

[1/2] drm/i915/ehl: Add EHL platform info and PCI IDs

Message ID 20190315191938.22211-1-rodrigo.vivi@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915/ehl: Add EHL platform info and PCI IDs | expand

Commit Message

Rodrigo Vivi March 15, 2019, 7:19 p.m. UTC 
From: James Ausmus <james.ausmus@intel.com>

Add known EHL PCI IDs.

v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
   	      patch cc'ing the appropriated list and maintainers for
	      proper ack.
v3: (Rodrigo): - Removed .num_pipes = 3 that is coming since GEN&_FEATURES.
    	       - Added ppgtt type and size after rework from Bob and Chris

Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 10 ++++++++++
 include/drm/i915_pciids.h       |  7 +++++++
 2 files changed, 17 insertions(+)

Comments

Souza, Jose March 15, 2019, 7:32 p.m. UTC | #1 
On Fri, 2019-03-15 at 12:19 -0700, Rodrigo Vivi wrote:
> From: James Ausmus <james.ausmus@intel.com>
> 
> Add known EHL PCI IDs.
> 
> v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
>    	      patch cc'ing the appropriated list and maintainers for
> 	      proper ack.
> v3: (Rodrigo): - Removed .num_pipes = 3 that is coming since
> GEN&_FEATURES.
>     	       - Added ppgtt type and size after rework from Bob and
> Chris
> 
> Cc: Bob Paauwe <bob.j.paauwe@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: James Ausmus <james.ausmus@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 10 ++++++++++
>  include/drm/i915_pciids.h       |  7 +++++++
>  2 files changed, 17 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index ef7410c492fd..aa26a2e9a466 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -730,6 +730,15 @@ static const struct intel_device_info
> intel_icelake_11_info = {
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) |
> BIT(VCS2),
>  };
>  
> +static const struct intel_device_info intel_elkhartlake_info = {
> +	GEN11_FEATURES,
> +	PLATFORM(INTEL_ICELAKE),
> +	.is_alpha_support = 1,
> +	.engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0),
> +	.ppgtt_type = INTEL_PPGTT_FULL,

Nit: You don't need to ppgtt_type it will come from GEN8.

Other than that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +	.ppgtt_size = 36,
> +};
> +
>  #undef GEN
>  #undef PLATFORM
>  
> @@ -797,6 +806,7 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
> +	INTEL_EHL_IDS(&intel_elkhartlake_info),
>  	{0, 0, 0}
>  };
>  MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index d200000feeaa..a0e409e9e70d 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -472,4 +472,11 @@
>  	INTEL_VGA_DEVICE(0x8A70, info), \
>  	INTEL_VGA_DEVICE(0x8A53, info)
>  
> +/* EHL */
> +#define INTEL_EHL_IDS(info) \
> +	INTEL_VGA_DEVICE(0x4500, info),	\
> +	INTEL_VGA_DEVICE(0x4571, info), \
> +	INTEL_VGA_DEVICE(0x4551, info), \
> +	INTEL_VGA_DEVICE(0x4541, info)
> +
>  #endif /* _I915_PCIIDS_H */
Paauwe, Bob J March 18, 2019, 4:14 p.m. UTC | #2 
On Fri, 15 Mar 2019 12:32:22 -0700
"Souza, Jose" <jose.souza@intel.com> wrote:

> On Fri, 2019-03-15 at 12:19 -0700, Rodrigo Vivi wrote:
> > From: James Ausmus <james.ausmus@intel.com>
> > 
> > Add known EHL PCI IDs.
> > 
> > v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
> >    	      patch cc'ing the appropriated list and maintainers for
> > 	      proper ack.
> > v3: (Rodrigo): - Removed .num_pipes = 3 that is coming since
> > GEN&_FEATURES.
> >     	       - Added ppgtt type and size after rework from Bob and
> > Chris
> > 
> > Cc: Bob Paauwe <bob.j.paauwe@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: James Ausmus <james.ausmus@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_pci.c | 10 ++++++++++
> >  include/drm/i915_pciids.h       |  7 +++++++
> >  2 files changed, 17 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c
> > b/drivers/gpu/drm/i915/i915_pci.c
> > index ef7410c492fd..aa26a2e9a466 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -730,6 +730,15 @@ static const struct intel_device_info
> > intel_icelake_11_info = {
> >  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) |
> > BIT(VCS2),
> >  };
> >  
> > +static const struct intel_device_info intel_elkhartlake_info = {
> > +	GEN11_FEATURES,
> > +	PLATFORM(INTEL_ICELAKE),
> > +	.is_alpha_support = 1,
> > +	.engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0),
> > +	.ppgtt_type = INTEL_PPGTT_FULL,  
> 
> Nit: You don't need to ppgtt_type it will come from GEN8.

I agree that this isn't needed
> 
> Other than that:
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

And 
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>

> 
> > +	.ppgtt_size = 36,
> > +};
> > +
> >  #undef GEN
> >  #undef PLATFORM
> >  
> > @@ -797,6 +806,7 @@ static const struct pci_device_id pciidlist[] = {
> >  	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> >  	INTEL_CNL_IDS(&intel_cannonlake_info),
> >  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
> > +	INTEL_EHL_IDS(&intel_elkhartlake_info),
> >  	{0, 0, 0}
> >  };
> >  MODULE_DEVICE_TABLE(pci, pciidlist);
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > index d200000feeaa..a0e409e9e70d 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -472,4 +472,11 @@
> >  	INTEL_VGA_DEVICE(0x8A70, info), \
> >  	INTEL_VGA_DEVICE(0x8A53, info)
> >  
> > +/* EHL */
> > +#define INTEL_EHL_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x4500, info),	\
> > +	INTEL_VGA_DEVICE(0x4571, info), \
> > +	INTEL_VGA_DEVICE(0x4551, info), \
> > +	INTEL_VGA_DEVICE(0x4541, info)
> > +
> >  #endif /* _I915_PCIIDS_H */
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ef7410c492fd..aa26a2e9a466 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -730,6 +730,15 @@  static const struct intel_device_info intel_icelake_11_info = {
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 };
 
+static const struct intel_device_info intel_elkhartlake_info = {
+	GEN11_FEATURES,
+	PLATFORM(INTEL_ICELAKE),
+	.is_alpha_support = 1,
+	.engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0),
+	.ppgtt_type = INTEL_PPGTT_FULL,
+	.ppgtt_size = 36,
+};
+
 #undef GEN
 #undef PLATFORM
 
@@ -797,6 +806,7 @@  static const struct pci_device_id pciidlist[] = {
 	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
 	INTEL_CNL_IDS(&intel_cannonlake_info),
 	INTEL_ICL_11_IDS(&intel_icelake_11_info),
+	INTEL_EHL_IDS(&intel_elkhartlake_info),
 	{0, 0, 0}
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index d200000feeaa..a0e409e9e70d 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -472,4 +472,11 @@ 
 	INTEL_VGA_DEVICE(0x8A70, info), \
 	INTEL_VGA_DEVICE(0x8A53, info)
 
+/* EHL */
+#define INTEL_EHL_IDS(info) \
+	INTEL_VGA_DEVICE(0x4500, info),	\
+	INTEL_VGA_DEVICE(0x4571, info), \
+	INTEL_VGA_DEVICE(0x4551, info), \
+	INTEL_VGA_DEVICE(0x4541, info)
+
 #endif /* _I915_PCIIDS_H */