diff mbox series

[5/7] drm/i915/icl: Disable video turbo mode for rp control

Message ID 20190409161310.20382-5-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 | expand

Commit Message

Mika Kuoppala April 9, 2019, 4:13 p.m. UTC
There is no video turbo mode for gen11, so don't set it.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Chris Wilson April 9, 2019, 4:32 p.m. UTC | #1
Quoting Mika Kuoppala (2019-04-09 17:13:08)
> There is no video turbo mode for gen11, so don't set it.
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 47f98e064de5..d6abba5c0b32 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6548,6 +6548,7 @@ static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
>         struct intel_rps *rps = &dev_priv->gt_pm.rps;
>         u32 threshold_up = 0, threshold_down = 0; /* in % */
>         u32 ei_up = 0, ei_down = 0;
> +       u32 media_turbo;
>  
>         lockdep_assert_held(&rps->power.mutex);
>  
> @@ -6605,8 +6606,10 @@ static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
>                    GT_INTERVAL_FROM_US(dev_priv,
>                                        ei_down * threshold_down / 100));
>  
> +       media_turbo = INTEL_GEN(dev_priv) > 9 ? 0 : GEN6_RP_MEDIA_TURBO;
> +
>         I915_WRITE(GEN6_RP_CONTROL,
> -                  GEN6_RP_MEDIA_TURBO |
> +                  media_turbo |

Looks short enough to fit inline?
-Chris
Mika Kuoppala April 10, 2019, 8:05 a.m. UTC | #2
Chris Wilson <chris@chris-wilson.co.uk> writes:

> Quoting Mika Kuoppala (2019-04-09 17:13:08)
>> There is no video turbo mode for gen11, so don't set it.
>> 
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 47f98e064de5..d6abba5c0b32 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -6548,6 +6548,7 @@ static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
>>         struct intel_rps *rps = &dev_priv->gt_pm.rps;
>>         u32 threshold_up = 0, threshold_down = 0; /* in % */
>>         u32 ei_up = 0, ei_down = 0;
>> +       u32 media_turbo;
>>  
>>         lockdep_assert_held(&rps->power.mutex);
>>  
>> @@ -6605,8 +6606,10 @@ static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
>>                    GT_INTERVAL_FROM_US(dev_priv,
>>                                        ei_down * threshold_down / 100));
>>  
>> +       media_turbo = INTEL_GEN(dev_priv) > 9 ? 0 : GEN6_RP_MEDIA_TURBO;
>> +
>>         I915_WRITE(GEN6_RP_CONTROL,
>> -                  GEN6_RP_MEDIA_TURBO |
>> +                  media_turbo |
>
> Looks short enough to fit inline?

It was inline at first. Then I thought that it was ugly and
gets pointed out in review and changed it. My heuristics
failed.

Well, inline coming up!
-mika
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 47f98e064de5..d6abba5c0b32 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6548,6 +6548,7 @@  static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
 	struct intel_rps *rps = &dev_priv->gt_pm.rps;
 	u32 threshold_up = 0, threshold_down = 0; /* in % */
 	u32 ei_up = 0, ei_down = 0;
+	u32 media_turbo;
 
 	lockdep_assert_held(&rps->power.mutex);
 
@@ -6605,8 +6606,10 @@  static void rps_set_power(struct drm_i915_private *dev_priv, int new_power)
 		   GT_INTERVAL_FROM_US(dev_priv,
 				       ei_down * threshold_down / 100));
 
+	media_turbo = INTEL_GEN(dev_priv) > 9 ? 0 : GEN6_RP_MEDIA_TURBO;
+
 	I915_WRITE(GEN6_RP_CONTROL,
-		   GEN6_RP_MEDIA_TURBO |
+		   media_turbo |
 		   GEN6_RP_MEDIA_HW_NORMAL_MODE |
 		   GEN6_RP_MEDIA_IS_GFX |
 		   GEN6_RP_ENABLE |