diff mbox series

[7/7] drm/i915/icl: Don't warn on spurious interrupts

Message ID 20190410105923.18546-7-mika.kuoppala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/7] drm/i915: Use dedicated rc6 enabling sequence for gen11 | expand

Commit Message

Mika Kuoppala April 10, 2019, 10:59 a.m. UTC
There is a chance we can see spurious interrupts in live
now. We have more engines enabled and that with more elaborate
access patterns with pm and display, increases the chances
hardware just makes a social call, without anything to work on.

Remove the error as we have tests to actually probe if
we really miss interrupt, instead of getting spurious ones.

Note that now we do write to intr_dw even with a zero
value. This is considered advantegous as the write
is an ack that sw is done.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

Comments

Chris Wilson April 10, 2019, 11:07 a.m. UTC | #1
Quoting Mika Kuoppala (2019-04-10 11:59:23)
> There is a chance we can see spurious interrupts in live
> now. We have more engines enabled and that with more elaborate
> access patterns with pm and display, increases the chances
> hardware just makes a social call, without anything to work on.
> 
> Remove the error as we have tests to actually probe if
> we really miss interrupt, instead of getting spurious ones.
> 
> Note that now we do write to intr_dw even with a zero
> value. This is considered advantegous as the write
> is an ack that sw is done.

Writing 0 back to 0 handled interrupts seems fair.
 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

I think both interrupt handling patches should go in first, as they are
bug fixes that may be required even before rps is fixed.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3531ef79ae21..d934545445e1 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3041,14 +3041,8 @@  gen11_gt_bank_handler(struct drm_i915_private * const i915,
 
 	intr_dw = raw_reg_read(regs, GEN11_GT_INTR_DW(bank));
 
-	if (unlikely(!intr_dw)) {
-		DRM_ERROR("GT_INTR_DW%u blank!\n", bank);
-		return;
-	}
-
 	for_each_set_bit(bit, &intr_dw, 32) {
-		const u32 ident = gen11_gt_engine_identity(i915,
-							   bank, bit);
+		const u32 ident = gen11_gt_engine_identity(i915, bank, bit);
 
 		gen11_gt_identity_handler(i915, ident);
 	}