From patchwork Thu Apr 25 21:50:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 10917827 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9ED3914B6 for ; Thu, 25 Apr 2019 21:50:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E7DD28D40 for ; Thu, 25 Apr 2019 21:50:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 831AA28D44; Thu, 25 Apr 2019 21:50:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 321E128D40 for ; Thu, 25 Apr 2019 21:50:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 83EE88925F; Thu, 25 Apr 2019 21:50:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id BEA848925C for ; Thu, 25 Apr 2019 21:50:25 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Apr 2019 14:50:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,394,1549958400"; d="scan'208";a="145779689" Received: from rdvivi-losangeles.jf.intel.com ([10.7.196.65]) by orsmga003.jf.intel.com with ESMTP; 25 Apr 2019 14:50:24 -0700 From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Thu, 25 Apr 2019 14:50:41 -0700 Message-Id: <20190425215041.28978-7-rodrigo.vivi@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190425215041.28978-1-rodrigo.vivi@intel.com> References: <20190425215041.28978-1-rodrigo.vivi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 7/7] drm/i915: Migrate more gen11 irq functions towards intel_irq and uncore funcs. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Let's continue the migration starting from newer to older platforms. The goal is to use intel_irq struct and intel_uncore_* functions along all i915_irq.c as much as possible. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_irq.c | 38 +++++++++++++++++++-------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 3e00cce5681c..ad9df32e8c29 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3099,9 +3099,9 @@ gen11_gt_irq_handler(struct intel_irq * const irq, } static u32 -gen11_gu_misc_irq_ack(struct drm_i915_private *dev_priv, const u32 master_ctl) +gen11_gu_misc_irq_ack(struct intel_irq *irq, const u32 master_ctl) { - void __iomem * const regs = dev_priv->uncore.regs; + void __iomem * const regs = irq->uncore->regs; u32 iir; if (!(master_ctl & GEN11_GU_MISC_IRQ)) @@ -3171,7 +3171,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) enable_rpm_wakeref_asserts(i915); } - gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl); + gu_misc_iir = gen11_gu_misc_irq_ack(&i915->irq, master_ctl); gen11_master_intr_enable(regs); @@ -4175,31 +4175,37 @@ static int gen8_irq_postinstall(struct drm_device *dev) return 0; } -static void gen11_gt_irq_postinstall(struct drm_i915_private *dev_priv) +static void gen11_gt_irq_postinstall(struct intel_irq *irq) { + struct intel_uncore *uncore = irq->uncore; const u32 irqs = GT_RENDER_USER_INTERRUPT | GT_CONTEXT_SWITCH_INTERRUPT; BUILD_BUG_ON(irqs & 0xffff0000); /* Enable RCS, BCS, VCS and VECS class interrupts. */ - I915_WRITE(GEN11_RENDER_COPY_INTR_ENABLE, irqs << 16 | irqs); - I915_WRITE(GEN11_VCS_VECS_INTR_ENABLE, irqs << 16 | irqs); + intel_uncore_write(uncore, GEN11_RENDER_COPY_INTR_ENABLE, + irqs << 16 | irqs); + intel_uncore_write(uncore, GEN11_VCS_VECS_INTR_ENABLE, + irqs << 16 | irqs); /* Unmask irqs on RCS, BCS, VCS and VECS engines. */ - I915_WRITE(GEN11_RCS0_RSVD_INTR_MASK, ~(irqs << 16)); - I915_WRITE(GEN11_BCS_RSVD_INTR_MASK, ~(irqs << 16)); - I915_WRITE(GEN11_VCS0_VCS1_INTR_MASK, ~(irqs | irqs << 16)); - I915_WRITE(GEN11_VCS2_VCS3_INTR_MASK, ~(irqs | irqs << 16)); - I915_WRITE(GEN11_VECS0_VECS1_INTR_MASK, ~(irqs | irqs << 16)); + intel_uncore_write(uncore, GEN11_RCS0_RSVD_INTR_MASK, ~(irqs << 16)); + intel_uncore_write(uncore, GEN11_BCS_RSVD_INTR_MASK, ~(irqs << 16)); + intel_uncore_write(uncore, GEN11_VCS0_VCS1_INTR_MASK, + ~(irqs | irqs << 16)); + intel_uncore_write(uncore, GEN11_VCS2_VCS3_INTR_MASK, + ~(irqs | irqs << 16)); + intel_uncore_write(uncore, GEN11_VECS0_VECS1_INTR_MASK, + ~(irqs | irqs << 16)); /* * RPS interrupts will get enabled/disabled on demand when RPS itself * is enabled/disabled. */ - dev_priv->irq.pm_ier = 0x0; - dev_priv->irq.pm_imr = ~dev_priv->irq.pm_ier; - I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_ENABLE, 0); - I915_WRITE(GEN11_GPM_WGBOXPERF_INTR_MASK, ~0); + irq->pm_ier = 0x0; + irq->pm_imr = ~irq->pm_ier; + intel_uncore_write(uncore, GEN11_GPM_WGBOXPERF_INTR_ENABLE, 0); + intel_uncore_write(uncore, GEN11_GPM_WGBOXPERF_INTR_MASK, ~0); } static void icp_irq_postinstall(struct drm_device *dev) @@ -4226,7 +4232,7 @@ static int gen11_irq_postinstall(struct drm_device *dev) if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) icp_irq_postinstall(dev); - gen11_gt_irq_postinstall(dev_priv); + gen11_gt_irq_postinstall(irq); gen8_de_irq_postinstall(dev_priv); GEN3_IRQ_INIT(irq, GEN11_GU_MISC_, ~gu_misc_masked, gu_misc_masked);