| Message ID | 20190508120437.12339-1-shashank.sharma@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Fix skl plane scaling for planner YUV buffers | expand |
On Wed, May 08, 2019 at 05:34:37PM +0530, Shashank Sharma wrote: > From: Lukas Rusak <lorusak@gmail.com> > > Plane scaling for YUV planar formats should be max 2 times. Nope. Spec says it should be < 2.0 on pre-glk, and < 3.0 on glk+. > > Cc: Maarten Lankhorst <maarten.lankhorst@intel.com> > Cc: Juha-pekka Heikkila <juha-pekka.heikkila@intel.com> > Cc: Shashank Sharma <shashank.sharma@intel.com> > > Signed-off-by: Lukas Rusak <lorusak@gmail.com> > --- > drivers/gpu/drm/i915/intel_display.c | 13 ++++++++----- > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index a351c8e219ba..2ac0a55a9c9f 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -13897,7 +13897,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, > { > struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > - int max_scale, mult; > + int max_scale, mult, remainder; > int crtc_clock, max_dotclk, tmpclk1, tmpclk2; > > if (!crtc_state->base.enable) > @@ -13914,12 +13914,15 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, > > /* > * skl max scale is lower of: > - * close to 3 but not 3, -1 is for that purpose > - * or > - * cdclk/crtc_clock > + * for planar YUV formats: 2 > + * or > + * for other formats: close to 3 but not 3, -1 is for that purpose > + * or > + * cdclk/crtc_clock > */ > mult = is_planar_yuv_format(pixel_format) ? 2 : 3; > - tmpclk1 = (1 << 16) * mult - 1; > + remainder = is_planar_yuv_format(pixel_format) ? 0 : 1; > + tmpclk1 = (1 << 16) * mult - remainder; > tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock); > max_scale = min(tmpclk1, tmpclk2); > > -- > 2.17.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a351c8e219ba..2ac0a55a9c9f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13897,7 +13897,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, { struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); - int max_scale, mult; + int max_scale, mult, remainder; int crtc_clock, max_dotclk, tmpclk1, tmpclk2; if (!crtc_state->base.enable) @@ -13914,12 +13914,15 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, /* * skl max scale is lower of: - * close to 3 but not 3, -1 is for that purpose - * or - * cdclk/crtc_clock + * for planar YUV formats: 2 + * or + * for other formats: close to 3 but not 3, -1 is for that purpose + * or + * cdclk/crtc_clock */ mult = is_planar_yuv_format(pixel_format) ? 2 : 3; - tmpclk1 = (1 << 16) * mult - 1; + remainder = is_planar_yuv_format(pixel_format) ? 0 : 1; + tmpclk1 = (1 << 16) * mult - remainder; tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock); max_scale = min(tmpclk1, tmpclk2);