From patchwork Fri Jun 14 16:43:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 10995995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C73F315E6 for ; Fri, 14 Jun 2019 16:44:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B7DAA26538 for ; Fri, 14 Jun 2019 16:44:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AC8192834A; Fri, 14 Jun 2019 16:44:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5E11326538 for ; Fri, 14 Jun 2019 16:44:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 60B1489B3B; Fri, 14 Jun 2019 16:44:12 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id AAA3C89B05 for ; Fri, 14 Jun 2019 16:43:57 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Jun 2019 09:43:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,373,1557212400"; d="scan'208";a="185013349" Received: from rosetta.fi.intel.com ([10.237.72.186]) by fmsmga002.fm.intel.com with ESMTP; 14 Jun 2019 09:43:54 -0700 Received: by rosetta.fi.intel.com (Postfix, from userid 1000) id DD7BB84064E; Fri, 14 Jun 2019 19:43:50 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Fri, 14 Jun 2019 19:43:47 +0300 Message-Id: <20190614164350.30415-7-mika.kuoppala@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190614164350.30415-1-mika.kuoppala@linux.intel.com> References: <20190614164350.30415-1-mika.kuoppala@linux.intel.com> Subject: [Intel-gfx] [PATCH 07/10] drm/i915/gtt: Check for physical page for pd entry always X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Check the physical page before writing the entry into the physical page. This further generalizes the pd so that manipulation in callsites will be identical, removing the need to handle pdps differently for gen8. Signed-off-by: Mika Kuoppala Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index a61fa24b6294..8baceb9f64c5 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -749,17 +749,11 @@ static void __set_pd_entry(struct i915_page_directory * const pd, #define set_pd_entry(pd, pde, to) ({ \ (pd)->entry[(pde)] = (to); \ - __set_pd_entry((pd), (pde), \ + if (likely(pd_has_phys_page(pd))) \ + __set_pd_entry((pd), (pde), \ gen8_pde_encode(px_dma(to), I915_CACHE_LLC)); \ }) -#define set_pdp_entry(pdp, pdpe, to) ({ \ - (pdp)->entry[(pdpe)] = (to); \ - if (pd_has_phys_page(pdp)) \ - __set_pd_entry((pdp), (pdpe), \ - gen8_pde_encode(px_dma(to), I915_CACHE_LLC));\ -}) - /* * PDE TLBs are a pain to invalidate on GEN8+. When we modify * the page table structures, we mark them dirty so that @@ -840,7 +834,7 @@ static bool gen8_ppgtt_clear_pdp(struct i915_address_space *vm, spin_lock(&pdp->lock); if (!atomic_read(&pd->used)) { - set_pdp_entry(pdp, pdpe, vm->scratch_pd); + set_pd_entry(pdp, pdpe, vm->scratch_pd); GEM_BUG_ON(!atomic_read(&pdp->used)); atomic_dec(&pdp->used); @@ -1381,7 +1375,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm, old = cmpxchg(&pdp->entry[pdpe], vm->scratch_pd, pd); if (old == vm->scratch_pd) { - set_pdp_entry(pdp, pdpe, pd); + set_pd_entry(pdp, pdpe, pd); atomic_inc(&pdp->used); } else { free_pd(vm, pd); @@ -1407,7 +1401,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm, unwind_pd: spin_lock(&pdp->lock); if (atomic_dec_and_test(&pd->used)) { - set_pdp_entry(pdp, pdpe, vm->scratch_pd); + set_pd_entry(pdp, pdpe, vm->scratch_pd); GEM_BUG_ON(!atomic_read(&pdp->used)); atomic_dec(&pdp->used); free_pd(vm, pd); @@ -1499,7 +1493,7 @@ static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt) goto unwind; init_pd(vm, pd, vm->scratch_pt); - set_pdp_entry(pdp, pdpe, pd); + set_pd_entry(pdp, pdpe, pd); atomic_inc(&pdp->used); } @@ -1511,7 +1505,7 @@ static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt) unwind: start -= from; gen8_for_each_pdpe(pd, pdp, from, start, pdpe) { - set_pdp_entry(pdp, pdpe, vm->scratch_pd); + set_pd_entry(pdp, pdpe, vm->scratch_pd); free_pd(vm, pd); } atomic_set(&pdp->used, 0);