diff mbox series

drm/i915: Disable SAMPLER_STATE prefetching on all Gen11 steppings.

Message ID 20190625055521.5730-1-kenneth@whitecape.org (mailing list archive)
State New, archived
Headers show
Series drm/i915: Disable SAMPLER_STATE prefetching on all Gen11 steppings. | expand

Commit Message

Kenneth Graunke June 25, 2019, 5:55 a.m. UTC 
The Demand Prefetch workaround (binding table prefetching) only applies
to Icelake A0/B0.  But the Sampler Prefetch workaround needs to be
applied to all Gen11 steppings, according to a programming note in the
SARCHKMD documentation.

Using the Intel Gallium driver, I have seen intermittent failures in
the dEQP-GLES31.functional.copy_image.non_compressed.* tests.  After
applying this workaround, the tests reliably pass.

BSpec: 9663
Cc: stable@vger.kernel.org
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
 1 file changed, 5 insertions(+)

Hi there!

We tried to work around this in the Mesa driver, and managed to do so
in i965, anv, iris, but missed doing so in blorp.  Oops!  I'm planning
on fixing that, but setting the SARCHKMD bit to shut off the broken
prefetching globally seems like a good idea.  That way, we make sure it
works for i965, anv, iris, libva, and all the other userspace drivers.

FWIW, I don't have commit access, so I would appreciate it if someone
could commit this for me assuming it clears review and testing.

 --Ken
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index c70445adfb02..a3cb35d058a6 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1254,6 +1254,11 @@  rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 				    GEN7_SARCHKMD,
 				    GEN7_DISABLE_DEMAND_PREFETCH |
 				    GEN7_DISABLE_SAMPLER_PREFETCH);
+
+		/* Wa_1606682166:icl */
+		wa_write_or(wal,
+			    GEN7_SARCHKMD,
+			    GEN7_DISABLE_SAMPLER_PREFETCH);
 	}
 
 	if (IS_GEN_RANGE(i915, 9, 11)) {