From patchwork Fri Jun 28 13:07:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Anshuman" X-Patchwork-Id: 11022447 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B002F924 for ; Fri, 28 Jun 2019 13:13:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A262C286BC for ; Fri, 28 Jun 2019 13:13:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9733E28763; Fri, 28 Jun 2019 13:13:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 46D1A287AA for ; Fri, 28 Jun 2019 13:13:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63B226E929; Fri, 28 Jun 2019 13:13:03 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0EE986E928 for ; Fri, 28 Jun 2019 13:13:01 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2019 06:13:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,427,1557212400"; d="scan'208";a="314131519" Received: from genxfsim-desktop.iind.intel.com ([10.223.74.120]) by orsmga004.jf.intel.com with ESMTP; 28 Jun 2019 06:12:58 -0700 From: Anshuman Gupta To: intel-gfx@lists.freedesktop.org Date: Fri, 28 Jun 2019 18:37:54 +0530 Message-Id: <20190628130754.9527-11-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190628130754.9527-1-anshuman.gupta@intel.com> References: <20190628130754.9527-1-anshuman.gupta@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/10] drm/i915/tgl: Added new DC5/DC6 counter. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP TGL onwards we have new DC5 and DC6 counter DMC_DEBUG1 and DMC_DEBUG2 these counter will retain there values upon DMC reset. Currently using IS_GEN() macro instead of IS_TIGERLAKE() to avoid compilation error and flot the pacthes. Will be using IS_TIGERLAKE() once TGL platform enabling pacthes merged to drm-tip. Cc: jani.nikula@intel.com Cc: imre.deak@intel.com Cc: animesh.manna@intel.com Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/i915_debugfs.c | 8 +++++--- drivers/gpu/drm/i915/i915_reg.h | 2 ++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 76e425cc19c2..3c0aa0cb74fa 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2736,11 +2736,13 @@ static int i915_dmc_info(struct seq_file *m, void *unused) seq_printf(m, "DC3CO count: %d\n", I915_READ(DMC_DEBUG3)); seq_printf(m, "DC3 -> DC5 count: %d\n", - I915_READ(IS_BROXTON(dev_priv) ? BXT_CSR_DC3_DC5_COUNT : - SKL_CSR_DC3_DC5_COUNT)); + I915_READ((INTEL_GEN(dev_priv) == 12) ? DMC_DEBUG1 : + (IS_BROXTON(dev_priv) ? BXT_CSR_DC3_DC5_COUNT : + SKL_CSR_DC3_DC5_COUNT))); if (!IS_GEN9_LP(dev_priv)) seq_printf(m, "DC5 -> DC6 count: %d\n", - I915_READ(SKL_CSR_DC5_DC6_COUNT)); + I915_READ((INTEL_GEN(dev_priv) == 12) ? DMC_DEBUG2 : + SKL_CSR_DC5_DC6_COUNT)); out: seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 3febd29df5d3..cdeff113d712 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7222,6 +7222,8 @@ enum { #define BXT_CSR_DC3_DC5_COUNT _MMIO(0x80038) /* DMC DEBUG COUNTERS for TGL*/ +#define DMC_DEBUG1 _MMIO(0x101084) +#define DMC_DEBUG2 _MMIO(0x101088) #define DMC_DEBUG3 _MMIO(0x101090) /*DC3CO debug counter*/ /* interrupts */