@@ -360,6 +360,12 @@ struct intel_csr {
u32 allowed_dc_mask;
intel_wakeref_t wakeref;
bool prefer_dc3co;
+ intel_wakeref_t dc5_wakeref;
+ /*
+ * Mutex to protect dc5_wakeref which make maintain proper
+ * power domain reference count of POWER_DOMAIN_VIDEO
+ */
+ struct mutex dc5_mutex;
};
enum i915_cache_level {
@@ -251,6 +251,7 @@ enum intel_display_power_domain {
POWER_DOMAIN_PORT_OTHER,
POWER_DOMAIN_VGA,
POWER_DOMAIN_AUDIO,
+ POWER_DOMAIN_VIDEO,
POWER_DOMAIN_AUX_A,
POWER_DOMAIN_AUX_B,
POWER_DOMAIN_AUX_C,
@@ -472,6 +472,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "VGA";
case POWER_DOMAIN_AUDIO:
return "AUDIO";
+ case POWER_DOMAIN_VIDEO:
+ return "VIDEO";
case POWER_DOMAIN_AUX_A:
return "AUX_A";
case POWER_DOMAIN_AUX_B:
@@ -2905,6 +2907,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
*/
#define ICL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
ICL_PW_2_POWER_DOMAINS | \
+ BIT_ULL(POWER_DOMAIN_VIDEO) | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
BIT_ULL(POWER_DOMAIN_INIT))
Added POWER_DOMAIN_VIDEO power domain and added its helper stuff. POWER_DOMAIN_VIDEO is a hook to "DC5 Off" power well. which can disallow DC5/6 in order to allow dc3co. Cc: jani.nikula@intel.com Cc: imre.deak@intel.com Cc: animesh.manna@intel.com Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 6 ++++++ drivers/gpu/drm/i915/intel_display.h | 1 + drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ 3 files changed, 10 insertions(+)