From patchwork Mon Jul 1 06:26:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025093 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1BC78746 for ; Mon, 1 Jul 2019 06:35:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 157F620453 for ; Mon, 1 Jul 2019 06:35:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0A190205A8; Mon, 1 Jul 2019 06:35:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 99F9C20453 for ; Mon, 1 Jul 2019 06:35:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F55C89F53; Mon, 1 Jul 2019 06:35:49 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 225C589F53 for ; Mon, 1 Jul 2019 06:35:45 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988590" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:33:57 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:19 +0530 Message-Id: <20190701062632.456-3-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/15] drm/i915/dsb: DSB context creation. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry , Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP The function will internally get the gem buffer from global GTT which is mapped in cpu domain to feed the data + opcode for DSB engine. Cc: Imre Deak Cc: Michel Thierry Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 4 ++ drivers/gpu/drm/i915/intel_dsb.c | 65 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsb.h | 31 +++++++++++++++ 5 files changed, 102 insertions(+) create mode 100644 drivers/gpu/drm/i915/intel_dsb.c create mode 100644 drivers/gpu/drm/i915/intel_dsb.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 3bd8f0349a8a..3416ba15b949 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -49,6 +49,7 @@ i915-y += i915_drv.o \ i915_sysfs.o \ intel_csr.o \ intel_device_info.o \ + intel_dsb.o \ intel_pm.o \ intel_runtime_pm.o \ intel_sideband.o \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ca6d3e2fe7a6..237c17427780 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -76,6 +76,7 @@ #include "gt/intel_workarounds.h" #include "intel_device_info.h" +#include "intel_dsb.h" #include "intel_runtime_pm.h" #include "intel_uc.h" #include "intel_uncore.h" diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1d58f7ec5d84..a05a047d78af 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -988,6 +988,10 @@ struct intel_crtc { /* scalers available on this crtc */ int num_scalers; + + /* per pipe DSB related info */ + struct intel_dsb dsb[MAX_DSB_PER_PIPE]; + int dsb_in_use; }; struct intel_plane { diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c new file mode 100644 index 000000000000..de6a8a901d88 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2019 Intel Corporation + * + */ + +#include "i915_drv.h" + +#define DSB_BUF_SIZE (2 * PAGE_SIZE) + +struct intel_dsb * +intel_dsb_get(struct intel_crtc *crtc) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *i915 = to_i915(dev); + struct drm_i915_gem_object *obj; + struct i915_vma *vma; + struct intel_dsb *dsb; + intel_wakeref_t wakeref; + int i; + + WARN_ON(crtc->dsb_in_use >= MAX_DSB_PER_PIPE); + + for (i = 0; i < MAX_DSB_PER_PIPE; i++) { + if (!crtc->dsb[i].cmd_buf) { + dsb = &crtc->dsb[i]; + dsb->id = i; + } + } + + dsb = &crtc->dsb[crtc->dsb_in_use]; + dsb->crtc = crtc; + if (!HAS_DSB(i915)) + return dsb; + + wakeref = intel_runtime_pm_get(&i915->runtime_pm); + mutex_lock(&i915->drm.struct_mutex); + + obj = i915_gem_object_create_shmem(i915, DSB_BUF_SIZE); + if (IS_ERR(obj)) + goto err; + + vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE); + if (IS_ERR(vma)) { + DRM_DEBUG_KMS("Vma creation failed.\n"); + i915_gem_object_put(obj); + goto err; + } + + dsb->cmd_buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC); + if (IS_ERR(dsb->cmd_buf)) { + DRM_DEBUG_KMS("Command buffer creation failed.\n"); + dsb->cmd_buf = NULL; + goto err; + } + crtc->dsb_in_use++; + dsb->cmd_buf_head = (uintptr_t)i915_ggtt_offset(vma); + dsb->vma = vma; + + memset(dsb->cmd_buf, 0, DSB_BUF_SIZE); +err: + mutex_unlock(&i915->drm.struct_mutex); + intel_runtime_pm_put(&i915->runtime_pm, wakeref); + return dsb; +} diff --git a/drivers/gpu/drm/i915/intel_dsb.h b/drivers/gpu/drm/i915/intel_dsb.h new file mode 100644 index 000000000000..50a2a6590a71 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dsb.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT + * + * Copyright © 2019 Intel Corporation + */ + +#ifndef _INTEL_DSB_H +#define _INTEL_DSB_H + +struct intel_crtc; +struct i915_vma; + +enum dsb_id { + INVALID_DSB = -1, + DSB1, + DSB2, + DSB3, + MAX_DSB_PER_PIPE +}; + +struct intel_dsb { + struct intel_crtc *crtc; + enum dsb_id id; + u32 *cmd_buf; + u32 cmd_buf_head; + struct i915_vma *vma; +}; + +struct intel_dsb * +intel_dsb_get(struct intel_crtc *crtc); + +#endif