From patchwork Mon Jul 1 06:26:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11025067 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E3120746 for ; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7C3628329 for ; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DBC10284DA; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 916E428329 for ; Mon, 1 Jul 2019 06:34:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E864589F61; Mon, 1 Jul 2019 06:34:15 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id A8AEF89F61 for ; Mon, 1 Jul 2019 06:34:14 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jun 2019 23:34:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,437,1557212400"; d="scan'208";a="153988655" Received: from amanna.iind.intel.com ([10.223.74.216]) by orsmga007.jf.intel.com with ESMTP; 30 Jun 2019 23:34:12 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Mon, 1 Jul 2019 11:56:23 +0530 Message-Id: <20190701062632.456-7-animesh.manna@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190701062632.456-1-animesh.manna@intel.com> References: <20190701062632.456-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/15] drm/i915/dsb: Update i915_write to call dsb-write. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Existing mmio-reg-write need intel_uncore handle which is part of dev_priv structure and the same design is followed by adding dsb handle in dev_priv for programming registers through DSB. I915_WRITE is modified to check for register capability and call dsb-reg-write based on its capability. No changes in I915_READ definition as DSB do not have support to read any register. Cc: Ville Syrjälä Cc: Jani Nikula Cc: Rodrigo Vivi Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/i915_drv.h | 6 +++++- drivers/gpu/drm/i915/intel_dsb.c | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 237c17427780..cd0ebc62fa92 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1880,6 +1880,8 @@ struct drm_i915_private { /* Mutex to protect the above hdcp component related values. */ struct mutex hdcp_comp_mutex; + struct intel_dsb *dsb; + /* * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch * will be rejected. Instead look for a better place. @@ -2716,7 +2718,9 @@ extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e, intel_uncore_##op__(&(dev_priv__)->uncore, __VA_ARGS__) #define I915_READ(reg__) __I915_REG_OP(read, dev_priv, (reg__)) -#define I915_WRITE(reg__, val__) __I915_REG_OP(write, dev_priv, (reg__), (val__)) +#define I915_WRITE(reg__, val__) \ + (reg__.cap) ? intel_dsb_reg_write(dev_priv->dsb, (reg__), (val__)) : \ + __I915_REG_OP(write, dev_priv, (reg__), (val__)) #define POSTING_READ(reg__) __I915_REG_OP(posting_read, dev_priv, (reg__)) diff --git a/drivers/gpu/drm/i915/intel_dsb.c b/drivers/gpu/drm/i915/intel_dsb.c index 31e1093977b6..aa5361c2d70e 100644 --- a/drivers/gpu/drm/i915/intel_dsb.c +++ b/drivers/gpu/drm/i915/intel_dsb.c @@ -122,7 +122,7 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val) u32 *buf = dsb->cmd_buf; if (!buf) { - I915_WRITE(reg, val); + intel_uncore_write(&(dev_priv)->uncore, reg, val); return; }