From patchwork Tue Jul 30 07:36:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11065241 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 91689112C for ; Tue, 30 Jul 2019 08:03:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 83DD01FFE4 for ; Tue, 30 Jul 2019 08:03:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7833F28681; Tue, 30 Jul 2019 08:03:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3856E1FFE4 for ; Tue, 30 Jul 2019 08:03:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C65D6E442; Tue, 30 Jul 2019 08:03:23 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 663646E442 for ; Tue, 30 Jul 2019 08:03:17 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jul 2019 01:03:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,326,1559545200"; d="scan'208";a="176702452" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga006.jf.intel.com with ESMTP; 30 Jul 2019 01:03:15 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Tue, 30 Jul 2019 13:06:46 +0530 Message-Id: <20190730073648.5157-5-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20190730073648.5157-1-vandita.kulkarni@intel.com> References: <20190730073648.5157-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v2 4/6] drm/i915/tgl/dsi: Gate the ddi clocks after pll mapping X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP For TGL, there is no need to keep DDI clock on till IO enabling for mipi dsi. Signed-off-by: Vandita Kulkarni Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/icl_dsi.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index c6cda529c5bb..eaf2779b89b8 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -607,7 +607,10 @@ static void gen11_dsi_map_pll(struct intel_encoder *encoder, I915_WRITE(ICL_DPCLKA_CFGCR0, val); for_each_dsi_phy(phy, intel_dsi->phys) { - val &= ~ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); + if (INTEL_GEN(dev_priv) >= 12) + val |= ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); + else + val &= ~ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); } I915_WRITE(ICL_DPCLKA_CFGCR0, val); @@ -951,6 +954,8 @@ static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) { + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + /* step 4a: power up all lanes of the DDI used by DSI */ gen11_dsi_power_up_lanes(encoder); @@ -973,7 +978,8 @@ gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, gen11_dsi_configure_transcoder(encoder, pipe_config); /* Step 4l: Gate DDI clocks */ - gen11_dsi_gate_clocks(encoder); + if (IS_GEN(dev_priv, 11)) + gen11_dsi_gate_clocks(encoder); } static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)