diff mbox series

[v3,2/9] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask

Message ID 20190730135024.31765-3-anshuman.gupta@intel.com (mailing list archive)
State New, archived
Headers show
Series DC3CO Support for TGL. | expand

Commit Message

Gupta, Anshuman July 30, 2019, 1:50 p.m. UTC 
Enables dc3co state in enable_dc module param
and adds dc3co enable mask to allowed_dc_mask and gen9_dc_mask.

Cc: Nikula, Jani <jani.nikula@intel.com>
Cc: Deak, Imre <imre.deak@intel.com>
Cc: Manna, Animesh <animesh.manna@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 13 +++++++++++--
 drivers/gpu/drm/i915/i915_params.c                 |  3 ++-
 2 files changed, 13 insertions(+), 3 deletions(-)

Comments

Manna, Animesh Aug. 1, 2019, 4:35 a.m. UTC | #1 
Hi,


On 7/30/2019 7:20 PM, Anshuman Gupta wrote:
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 296452f9efe4..7a46dc957660 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -46,7 +46,8 @@ i915_param_named(modeset, int, 0400,
>   
>   i915_param_named_unsafe(enable_dc, int, 0400,
>   	"Enable power-saving display C-states. "
> -	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
> +	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> +	"3=up to DC6 with DC3CO)");
What about DC3co with DC5? User do not an option to enable DC3co with 
upto DC5 enabled.

Regards,
Animesh
>   
>   i915_param_named_unsafe(enable_fbc, int, 0600,
>   	"Enable frame buffer compression for power savings "
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index dd2a50b8ba0a..d9585d08e081 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -717,6 +717,10 @@  static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
 	u32 mask;
 
 	mask = DC_STATE_EN_UPTO_DC5;
+
+	if (INTEL_GEN(dev_priv) == 12)
+		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6
+					  | DC_STATE_EN_DC9;
 	if (INTEL_GEN(dev_priv) >= 11)
 		mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;
 	else if (IS_GEN9_LP(dev_priv))
@@ -3946,7 +3950,10 @@  static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 	int requested_dc;
 	int max_dc;
 
-	if (INTEL_GEN(dev_priv) >= 11) {
+	if (INTEL_GEN(dev_priv) == 12) {
+		max_dc = 3;
+		mask = DC_STATE_EN_DC9;
+	} else if (INTEL_GEN(dev_priv) >= 11) {
 		max_dc = 2;
 		/*
 		 * DC9 has a separate HW flow from the rest of the DC states,
@@ -3972,7 +3979,7 @@  static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 		requested_dc = enable_dc;
 	} else if (enable_dc == -1) {
 		requested_dc = max_dc;
-	} else if (enable_dc > max_dc && enable_dc <= 2) {
+	} else if (enable_dc > max_dc && enable_dc <= 3) {
 		DRM_DEBUG_KMS("Adjusting requested max DC state (%d->%d)\n",
 			      enable_dc, max_dc);
 		requested_dc = max_dc;
@@ -3981,6 +3988,8 @@  static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 		requested_dc = max_dc;
 	}
 
+	if (requested_dc > 2)
+		mask |= DC_STATE_EN_DC3CO;
 	if (requested_dc > 1)
 		mask |= DC_STATE_EN_UPTO_DC6;
 	if (requested_dc > 0)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 296452f9efe4..7a46dc957660 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -46,7 +46,8 @@  i915_param_named(modeset, int, 0400,
 
 i915_param_named_unsafe(enable_dc, int, 0400,
 	"Enable power-saving display C-states. "
-	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
+	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
+	"3=up to DC6 with DC3CO)");
 
 i915_param_named_unsafe(enable_fbc, int, 0600,
 	"Enable frame buffer compression for power savings "