From patchwork Mon Oct 14 11:01:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11188353 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4792715AB for ; Mon, 14 Oct 2019 11:31:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3020420650 for ; Mon, 14 Oct 2019 11:31:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3020420650 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A079F6E28E; Mon, 14 Oct 2019 11:31:00 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5DE176E284 for ; Mon, 14 Oct 2019 11:30:52 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Oct 2019 04:30:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,295,1566889200"; d="scan'208";a="185465905" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga007.jf.intel.com with ESMTP; 14 Oct 2019 04:30:50 -0700 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Mon, 14 Oct 2019 16:31:21 +0530 Message-Id: <20191014110122.31923-7-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20191014110122.31923-1-vandita.kulkarni@intel.com> References: <20191014110122.31923-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 6/7] drm/i915/dsi: Add TE handler for dsi cmd mode. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In case of dual link, we get the TE on slave. So clear the TE on slave DSI IIR. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/i915_irq.c | 61 +++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index bfb2a63504fb..d12efa72943b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2628,6 +2628,61 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) DRM_ERROR("Unexpected DE Misc interrupt\n"); } +void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv, + u32 iir_value) +{ + enum pipe pipe = INVALID_PIPE; + enum port port; + enum transcoder dsi_trans; + u32 val; + + /* + * Incase of dual link, TE comes from DSI_1 + * this is to check if dual link is enabled + */ + val = I915_READ(TRANS_DDI_FUNC_CTL2(TRANSCODER_DSI_0)); + val &= PORT_SYNC_MODE_ENABLE; + + /* + * if dual link is enabled, then read DSI_0 + * transcoder registers + */ + port = ((iir_value & ICL_DSI_1) && val) || (iir_value & ICL_DSI_0) ? PORT_A : PORT_B; + dsi_trans = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1; + + /* Check if DSI configured in command mode */ + val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans)); + val = (val & OP_MODE_MASK) >> 28; + + if (val) { + DRM_ERROR("DSI trancoder not configured in command mode\n"); + return; + } + + /* Get PIPE for handling VBLANK event */ + val = I915_READ(TRANS_DDI_FUNC_CTL(dsi_trans)); + switch (val & TRANS_DDI_EDP_INPUT_MASK) { + case TRANS_DDI_EDP_INPUT_A_ON: + pipe = PIPE_A; + break; + case TRANS_DDI_EDP_INPUT_B_ONOFF: + pipe = PIPE_B; + break; + case TRANS_DDI_EDP_INPUT_C_ONOFF: + pipe = PIPE_C; + break; + default: + DRM_ERROR("Invalid PIPE\n"); + } + + /* clear TE in dsi IIR */ + port = (iir_value & ICL_DSI_1) ? PORT_B : PORT_A; + val = I915_READ(ICL_DSI_INTR_IDENT_REG(port)); + I915_WRITE((ICL_DSI_INTR_IDENT_REG(port)), val); + + drm_handle_vblank(&dev_priv->drm, pipe); +} + static irqreturn_t gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) { @@ -2692,6 +2747,12 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) found = true; } + if ((INTEL_GEN(dev_priv) >= 11) && + (iir & (ICL_DSI_0 | ICL_DSI_1))) { + gen11_dsi_te_interrupt_handler(dev_priv, iir); + found = true; + } + if (!found) DRM_ERROR("Unexpected DE Port interrupt\n"); }