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[v2,5/5] drm/i915/dp: Call dp_vsc_enable() / dp_hdr_metata_enable() on pipe updates

Message ID 20191025125530.1015447-6-gwan-gyeong.mun@intel.com (mailing list archive)
State New, archived
Headers show
Series Update VSC SDP / HDR Metadata SDP states on pipe updates. | expand

Commit Message

Gwan-gyeong Mun Oct. 25, 2019, 12:55 p.m. UTC
Call intel_dp_vsc_enable() and intel_dp_hdr_metadata_enable() on pipe
updates to make sure that we enable sending of VSC SDP and HDR Metadata
Infoframe SDP packet (when applicable) on fastsets.

These functions check pipe state and when the features does not need,
they disable the features.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 1a49266f4f57..e07591ff2a6e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4020,6 +4020,8 @@  static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
 	intel_ddi_set_dp_msa(crtc_state, conn_state);
 
 	intel_psr_update(intel_dp, crtc_state);
+	intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
+	intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
 	intel_edp_drrs_enable(intel_dp, crtc_state);
 
 	intel_panel_update_backlight(encoder, crtc_state, conn_state);