diff mbox series

[v2] drm/i915: update rawclk also on resume

Message ID 20191101144536.23558-1-shawn.c.lee@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915: update rawclk also on resume | expand

Commit Message

Lee, Shawn C Nov. 1, 2019, 2:45 p.m. UTC 
Since CNP it's possible for rawclk to have two different values, 19.2
and 24 MHz. If the value indicated by SFUSE_STRAP register is different
from the power on default for PCH_RAWCLK_FREQ, we'll end up having a
mismatch between the rawclk hardware and software states after
suspend/resume. On previous platforms this used to work by accident,
because the power on defaults worked just fine.

Update the rawclk also on resume. The natural place to do this is
intel_modeset_init_hw(), however VLV/CHV need it done before
intel_power_domains_init_hw(). Split the update accordingly, even if
that's slighly ugly. This means moving the update later for non-VLV/CHV
platforms in probe.

v2: Do intel_update_rawclk() at intel_power_domains_init_hw(). Rawclk will
be configured with proper setting and executed before intel_modeset_init_hw().

Reported-by: Shawn Lee <shawn.c.lee@intel.com>
Cc: Shawn Lee <shawn.c.lee@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++++
 drivers/gpu/drm/i915/i915_drv.c                    | 3 ---
 2 files changed, 6 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index dd2a50b8ba0a..089ba6cbb348 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4914,6 +4914,12 @@  void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
 
 	power_domains->initializing = true;
 
+	/*
+	 * Must happen before power domain init on VLV/CHV, the rest update
+	 * rawclk can be done here as well.
+	 */
+	intel_update_rawclk(i915);
+
 	if (INTEL_GEN(i915) >= 11) {
 		icl_display_core_init(i915, resume);
 	} else if (IS_CANNONLAKE(i915)) {
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f2d3d754af37..1f36e3c3f967 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -716,9 +716,6 @@  static int i915_driver_modeset_probe(struct drm_device *dev)
 	if (ret)
 		goto cleanup_vga_client;
 
-	/* must happen before intel_power_domains_init_hw() on VLV/CHV */
-	intel_update_rawclk(dev_priv);
-
 	intel_power_domains_init_hw(dev_priv, false);
 
 	intel_csr_ucode_init(dev_priv);