diff mbox series

[RFC-v2,4/9] drm/i915/dsi: Add cmd mode flags in display mode private flags

Message ID 20191111111029.9126-5-vandita.kulkarni@intel.com (mailing list archive)
State New, archived
Headers show
Series Add support for mipi dsi cmd mode | expand

Commit Message

Kulkarni, Vandita Nov. 11, 2019, 11:10 a.m. UTC
Adding TE flags and periodic command mode flags
as part of private flags to indicate what TE interrupts
we would be getting instead of vblanks in case of mipi dsi
command mode.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Jani Nikula Nov. 12, 2019, 4:27 p.m. UTC | #1
On Mon, 11 Nov 2019, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> Adding TE flags and periodic command mode flags
> as part of private flags to indicate what TE interrupts
> we would be getting instead of vblanks in case of mipi dsi
> command mode.
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index fadd9853f966..f36e8e4e5b55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -656,6 +656,12 @@ struct intel_crtc_scaler_state {
>  #define I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP (1<<1)
>  /* Flag to use the scanline counter instead of the pixel counter */
>  #define I915_MODE_FLAG_USE_SCANLINE_COUNTER (1<<2)
> +/* Flag to use TE from DSI0 instead of VBI in command mode */
> +#define I915_MODE_FLAG_DSI_USE_TE0 (1<<3)
> +/* Flag to use TE from DSI1 instead of VBI in command mode */
> +#define I915_MODE_FLAG_DSI_USE_TE1 (1<<4)

Might be useful to comment that one or the other is set if the crtc has
a DSI encoder that's operating in command mode, and both are unset
otherwise.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> +/* Flag to indicate mipi dsi periodic command mode where we do not get TE */
> +#define I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE (1<<5)
>  
>  struct intel_pipe_wm {
>  	struct intel_wm_level wm[5];
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index fadd9853f966..f36e8e4e5b55 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -656,6 +656,12 @@  struct intel_crtc_scaler_state {
 #define I915_MODE_FLAG_GET_SCANLINE_FROM_TIMESTAMP (1<<1)
 /* Flag to use the scanline counter instead of the pixel counter */
 #define I915_MODE_FLAG_USE_SCANLINE_COUNTER (1<<2)
+/* Flag to use TE from DSI0 instead of VBI in command mode */
+#define I915_MODE_FLAG_DSI_USE_TE0 (1<<3)
+/* Flag to use TE from DSI1 instead of VBI in command mode */
+#define I915_MODE_FLAG_DSI_USE_TE1 (1<<4)
+/* Flag to indicate mipi dsi periodic command mode where we do not get TE */
+#define I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE (1<<5)
 
 struct intel_pipe_wm {
 	struct intel_wm_level wm[5];