From patchwork Thu Jan 9 11:08:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 11325501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DF30E930 for ; Thu, 9 Jan 2020 11:42:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C7CAD2075D for ; Thu, 9 Jan 2020 11:42:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C7CAD2075D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5D9576E8F9; Thu, 9 Jan 2020 11:42:07 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id DA21D6E90E for ; Thu, 9 Jan 2020 11:42:05 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jan 2020 03:42:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,413,1571727600"; d="scan'208";a="223264665" Received: from vandita-desktop.iind.intel.com ([10.223.74.218]) by orsmga006.jf.intel.com with ESMTP; 09 Jan 2020 03:42:03 -0800 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Thu, 9 Jan 2020 16:38:34 +0530 Message-Id: <20200109110835.29764-9-vandita.kulkarni@intel.com> X-Mailer: git-send-email 2.21.0.5.gaeb582a In-Reply-To: <20200109110835.29764-1-vandita.kulkarni@intel.com> References: <20200109110835.29764-1-vandita.kulkarni@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [V6 8/9] drm/i915/dsi: Initiate fame request in cmd mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In TE Gate mode, on every flip we need to set the frame update request bit. After this bit is set transcoder hardware will automatically send the frame data to the panel when it receives the TE event. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/display/icl_dsi.c | 26 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++ drivers/gpu/drm/i915/display/intel_dsi.h | 3 +++ 3 files changed, 41 insertions(+) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 6f760ea316d8..46b8731a4554 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -199,6 +199,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host *host, return 0; } +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + u32 tmp, private_flags; + enum port port; + + private_flags = crtc_state->hw.adjusted_mode.private_flags; + + /* + * case 1 also covers dual link + * In case of dual link, frame update should be set on + * DSI_0 + */ + if (private_flags & I915_MODE_FLAG_DSI_USE_TE0) + port = PORT_A; + else if (private_flags & I915_MODE_FLAG_DSI_USE_TE1) + port = PORT_B; + else + return; + + tmp = I915_READ(DSI_CMD_FRMCTL(port)); + tmp |= DSI_FRAME_UPDATE_REQUEST; + I915_WRITE(DSI_CMD_FRMCTL(port), tmp); +} + static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 59c375879186..76cfd39300ee 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -15411,6 +15411,18 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_color_load_luts(new_crtc_state); } + /* + * Incase of mipi dsi command mode, we need to set frame update + * for every commit + */ + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { + if ((INTEL_GEN(dev_priv) >= 11) && + (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))) { + if (new_crtc_state->hw.active) + gen11_dsi_frame_update(new_crtc_state); + } + } + /* * Now that the vblank has passed, we can go ahead and program the * optimal watermarks on platforms that need two-step watermark diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h index 7481a5aa3084..6e64d3d2cd0a 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi.h +++ b/drivers/gpu/drm/i915/display/intel_dsi.h @@ -202,6 +202,9 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder, struct intel_crtc_state *config); void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port); +/* icl_dsi.c */ +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state); + /* intel_dsi_vbt.c */ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id); void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);